P3041NSN7NNC View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

P3041NSN7NNC

P3041 QorIQ Integrated Processor Hardware Specifications

Freescale Semiconductor 

Pin Assignments and Reset States

Table 1. Pins List by Bus (continued)

Signal

Signal Description

Package Pin Power

Pin Number Type Supply

eSPI

SPI_MOSI

SPI_MISO

SPI_CLK

SPI_CS0/SDHC_DAT4

SPI_CS1/SDHC_DAT5

SPI_CS2/SDHC_DAT6

SPI_CS3/SDHC_DAT7

Master out slave in

Master in slave out

eSPI clock

eSPI chip select

eSPI chip select

eSPI chip select

eSPI chip select

IEEE 1588

TSEC_1588_CLK_IN

Clock in

TSEC_1588_TRIG_IN1

Trigger in 1

TSEC_1588_TRIG_IN2/EC1_RX_ER

Trigger in 2

TSEC_1588_ALARM_OUT1

Alarm out 1

TSEC_1588_ALARM_OUT2/EC1_COL/G Alarm out 2

PIO30

TSEC_1588_CLK_OUT

Clock out

TSEC_1588_PULSE_OUT1

Pulse out1

TSEC_1588_PULSE_OUT2/EC1_CRS/GP Pulse out2

IO31

Ethernet Management Interface 1

EMI1_MDC

EMI1_MDIO

Management data clock

Management data in/out

Ethernet Management Interface 2

EMI2_MDC

Management data clock

AT29

I/O

CVDD

AH28

I

CVDD

AK29

O

CVDD

AN29

O

CVDD

AJ28

O

CVDD

AR29

O

CVDD

AM29

O

CVDD

AL35

I

AL36

I

AK36

I

AJ36

O

AK35

O

AM30

O

AL30

O

AJ34

O

LVDD

LVDD

LVDD

LVDD

LVDD

LVDD

LVDD

LVDD

AJ33

O

LVDD

AL32

I/O

LVDD

AK30

O

1.2 V

EMI2_MDIO

Management data in/out

AJ30

I/O

1.2 V

EC1_GTX_CLK125

EC2_GTX_CLK125

EC_XTRNL_TX_STMP1

EC_XTRNL_RX_STMP1

EC_XTRNL_TX_STMP2

Ethernet Reference Clock

Reference clock (RGMII)

Reference clock (RGMII)

AK34

I

LVDD

AL33

I

LVDD

Ethernet External Timestamping

External timestamp transmit 1

External timestamp receive 1

External timestamp transmit 2

AM31

I

LVDD

AK32

I

LVDD

AJ31

I

LVDD

Notes

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—

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26

26

26

26

—

—

—

—

26

—

—

26

—

—

2, 18,

22

2, 18,

22

27

27

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P3041 QorIQ Integrated Processor Hardware Specifications, Rev. 2

Freescale Semiconductor

17

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