AT45D01SSHB1D--B View Datasheet(PDF) - Unspecified
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AT45D01SSHB1D--B Datasheet PDF : 51 Pages
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(A16 - A0) and a dummy byte. Following the dummy byte, additional clock pulses on the SCK
pin will result in data being output on the SO (serial output) pin.
The CS pin must remain low during the loading of the opcode, the address bytes, and the read-
ing of data. When the end of a page in the main memory is reached during a Continuous Array
Read, the device will continue reading at the beginning of the next page with no delays incurred
during the page boundary crossover (the crossover from the end of one page to the beginning of
the next page). When the last bit in the main memory array has been read, the device will con-
tinue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the
beginning of the array. A low-to-high transition on the CS pin will terminate the read operation
and tri-state the output pin (SO). The maximum SCK frequency allowable for the Continuous
Array Read is defined by the fCAR1 specification. The Continuous Array Read bypasses the data
buffer and leaves the contents of the buffer unchanged.
6.3 Continuous Array Read (Low Frequency Mode: 03H): Up to 33MHz
This command can be used with the serial interface to read the main memory array sequentially
without a dummy byte up to maximum frequencies specified by fCAR2. To perform a continuous
read array with the page size set to 264-bytes, the CS must first be asserted then an opcode,
03H, must be clocked into the device followed by three address bytes (which comprise the 24-bit
page and byte address sequence). The first nine bits (PA8 - PA0) of the 18-bit address
sequence specify which page of the main memory array to read, and the last nine bits (BA8 -
BA0) of the 18-bit address sequence specify the starting byte address within the page. To per-
form a continuous read with the page size set to 256-bytes, the opcode, 03H, must be clocked
into the device followed by three address bytes (A16 - A0). Following the address bytes, addi-
tional clock pulses on the SCK pin will result in data being output on the SO (serial output) pin.
The CS pin must remain low during the loading of the opcode, the address bytes, and the read-
ing of data. When the end of a page in the main memory is reached during a Continuous Array
Read, the device will continue reading at the beginning of the next page with no delays incurred
during the page boundary crossover (the crossover from the end of one page to the beginning of
the next page). When the last bit in the main memory array has been read, the device will con-
tinue reading back at the beginning of the first page of memory. As with crossing over page
boundaries, no delays will be incurred when wrapping around from the end of the array to the
beginning of the array. A low-to-high transition on the CS pin will terminate the read operation
and tri-state the output pin (SO). The Continuous Array Read bypasses the data buffer and
leaves the contents of the buffer unchanged.
6.4 Main Memory Page Read
A main memory page read allows the user to read data directly from any one of the 2,048 pages
in the main memory, bypassing the data buffer and leaving the contents of the buffer
unchanged. To start a page read from the DataFlash standard page size (264-bytes), an opcode
of D2H must be clocked into the device followed by three address bytes (which comprise the
24-bit page and byte address sequence) and four don’t care bytes. The first nine bits (PA8 -
PA0) of the 18-bit address sequence specify the page in main memory to be read, and the last
nine bits (BA8 - BA0) of the 18-bit address sequence specify the starting byte address within
that page. To start a page read from the binary page size (256-bytes), the opcode D2H must be
clocked into the device followed by three address bytes and four don’t care bytes. The first nine
bits (A16 - A8) of the 17-bit sequence specify which page of the main memory array to read, and
the last eight bits (A7 - A0) of the 17-bit address sequence specify the starting byte address
within the page. The don’t care bytes that follow the address bytes are sent to initialize the read
6 AT45DB011D
3639M–DFLASH–11/2017
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