L1N06CLE View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
L1N06CLE Datasheet PDF : 7 Pages
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RLP1N06CLE
Typical Performance Curves Unless Otherwise Specified (Continued)
10
RθJC =
4.17oC/W
8
150oC 100oC
50oC
6
125oC
75oC
STARTING
TEMP = 25oC
4
2
10
8
6
4
STARTING
125oC 75oC
TEMP = 25oC
150oC
2
100oC
50oC
RθJC =
4.17oC/W
0
0
5
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Heatsink thermal resistance = 10oC/W
Heatsink thermal capacitance = 1j/oC
FIGURE 19. TIME TO 175oC IN CURRENT LIMITING
10
8
0
0
5
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: Heatsink thermal resistance = 25oC/W
Heatsink thermal capacitance = 0.5j/oC
FIGURE 20. TIME TO 175oC IN CURRENT LIMITING
RθJA =
80oC/W
6
4
2
125oC
75oC
150oC
100oC
STARTING
TEMP = 25oC
0
0
5
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
NOTE: No external heatsink
FIGURE 21. TIME TO 175oC IN CURRENT LIMITING
Detailed Description
Temperature Dependence of Current Limiting and
Switching Speed
The RLP1N06CLE is a monolithic power device which
incorporates a logic level PowerMOS transistor with a resistor
in series with the source. The base and emitter of a lateral
bipolar transistor is connected across this resistor, and the
collector of the bipolar transistor is connected to the gate of
the PowerMOS transistor. When the voltage across the
resistor reaches the value required to forward bias the emitter
base junction of the bipolar transistor, the bipolar transistor
“turns on”. A series resistor is incorporated in series with the
gate of the PowerMOS transistor allowing the bipolar
transistor to drive the gate of the PowerMOS transistors to a
voltage which just maintains a constant current in the
PowerMOS transistor. Since both the resistance of the resistor
in series with the PowerMOS transistor source and voltage
required to forward bias the base emitter junction of the
bipolar transistor vary with the temperature, the current at
which the device limits is a function of temperature. This
dependence is shown in figure 2.
The resistor in series with the gate of the PowerMOS
transistor results in much slower switching than in most
PowerMOS transistors. This is an advantage where fast
switching can cause EMI or RFI. The switching speed is very
predictable, and a minimum as well as maximum fall time is
given in the device characteristics for this type.
DC Operation of the RLP1N06CLE
The limit of the drain to source voltage for operation in
current limiting on a steady state (DC) basis is shown as
Figure 11. The dissipation in the device is simply the applied
drain to source voltage multiplied by the limiting current. This
6-433
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