24AA080-SN View Datasheet(PDF) - Microchip Technology
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Description
Manufacturer
24AA080-SN Datasheet PDF : 12 Pages
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25AA080/160
TABLE 1-3: AC CHARACTERISTICS
Applicable over recommended operating ranges shown below unless otherwise noted.
VCC = +1.8V to 5.5V
Commercial (C): Tamb = 0˚C to +70˚C
Industrial (I):
Tamb = -40°C to +85°C
Symbol
Parameter
Min
Max
Units
Test Conditions
fSCK Clock Frequency
—
3
MHz VCC=4.5V to 5.5V
—
2
MHz VCC=2.5V to 4.5V
—
1
MHz VCC=1.8V to 2.5V
tCSS CS Setup Time
100
—
250
—
500
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tCSH CS Hold Time
100
—
250
—
500
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tCSD CS Disable Time
250
—
500
—
500
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tSU Data Setup Time
30
—
50
—
50
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tHD Data Hold Time
50
—
100
—
100
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tR
CLK Rise Time
—
2
µs (Note 1)
tF
CLK Fall Time
—
2
µs (Note 1)
tHI Clock High Time
150
—
250
—
475
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tLO Clock Low Time
150
—
250
—
475
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tCLD Clock Delay Time
50
—
ns
tV
Output Valid from
Clock Low
—
150
—
250
—
475
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tHO Output Hold Time
0
—
ns
tDIS Output Disable Time
—
200
—
250
—
500
ns VCC=4.5V to 5.5V (Note 1)
ns VCC=2.5V to 4.5V (Note 1)
ns VCC=1.8V to 2.5V (Note 1)
tHS HOLD Setup Time
100
—
100
—
200
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tHH HOLD Hold Time
100
—
100
—
200
—
ns VCC=4.5V to 5.5V
ns VCC=2.5V to 4.5V
ns VCC=1.8V to 2.5V
tHZ HOLD Low to Output High-Z
100
—
150
—
200
—
ns VCC=4.5V to 5.5V (Note 1)
ns VCC=2.5V to 4.5V (Note 1)
ns VCC=1.8V to 2.5V (Note 1)
tHV HOLD High to Output Valid
100
—
150
—
200
—
ns VCC=4.5V to 5.5V (Note 1)
ns VCC=2.5V to 4.5V (Note 1)
ns VCC=1.8V to 2.5V (Note 1)
tWC Internal Write Cycle Time
—
5
ms (Note 2)
—
Endurance
10M
—
E/W 25°C, Vcc = 5.0V, Block Mode (Note 3)
Cycles
Note 1: This parameter is periodically sampled and not 100% tested.
2: twc begins on the rising edge of CS after a valid write sequence and ends when the internal self-timed write cycle is com-
plete.
3: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific application, please
consult the Total Endurance Model which can be obtained on our BBS or website.
DS21146D-page 4
Preliminary
© 1996 Microchip Technology Inc.
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