K4H510438D-TLA2 View Datasheet(PDF) - Samsung
Part Name
Description
Manufacturer
K4H510438D-TLA2 Datasheet PDF : 51 Pages
| |||
256Mb DDR SDRAM
Preliminary
List of figures
Figure 1 : 256Mb Package Pinout
6
Figure 2 : Package dimension
11
Figure 3 :State digram
12
Figure 4 : Power up and initialization sequence
13
Figure 5 : Mode register set
14
Figure 6 : Mode register set sequence
15
Figure 7 : Extend mode register set
16
Figure 8 : Bank activation command cycle timing
18
Figure 9 : Burst read operation timing
19
Figure 10 : Burst write operation timing
20
Figure 11 : Read interrupted by a read timing
21
Figure 12 : Read interrupted by a write and burst stop timing
21
Figure 13 : Read interrupted by a precharge timing
22
Figure 14 : Write interrupted by a write timing
23
Figure 15 : Write interrupted by a read and DM timing
24
Figure 16 : Write interrupted by a precharge and DM timing
25
Figure 17 : Burst stop timing
26
Figure 18 : DM masking timing
27
Figure 19 : Read with auto precharge timing
28
Figure 20 : Write with auto precharge timing
29
Figure 21 : Auto refresh timing
30
Figure 22 : Self refresh timing
30
Figure 23 : Power down entry and exit timing
31
Figure 24 : Output Load Circuit (SSTL_2)
44
Figure 25 : I / V characteristics for input/output buffers:
45
pull-up(above) and pull-down(below) for normal strength driver
Figure 26 : I / V characteristics for input/output buffers:
47
pull-up(above) and pull-down(below) for half strength driver
Figure 27 : QFC timing on read operation
49
Figure 28 : QFC timing on write operation with tDQSSmax
50
Figure 29 : QFC timing on write operation with tDQSSmin
50
Figure 30 : QFC timing example for interrupted writes operation
51
-6-
REV. 0.3 November 2. 2000
Share Link: 