25AA080-/P View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
25AA080-/P Datasheet PDF : 22 Pages
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25AA080/25LC080/25C080
3.7 Data Protection
The following protection has been implemented to
prevent inadvertent writes to the array:
• The write enable latch is reset on power-up
• A WRITE ENABLE instruction must be issued to
set the write enable latch
• After a byte write, page write or Status register
write, the write enable latch is reset
• CS must be set high after the proper number of
clock cycles to start an internal write cycle
• Access to the array during an internal write cycle
is ignored and programming is continued
3.8 Power-On State
The 25XX080 powers on in the following state:
• The device is in low-power Standby mode
(CS = 1)
• The write enable latch is reset
• SO is in high-impedance state
• A high-to-low level transition on CS is required to
enter active state
TABLE 3-3: WRITE-PROTECT FUNCTIONALITY MATRIX
WPEN
X
0
1
X
WP
X
X
Low
High
WEL
0
1
1
1
Protected Blocks
Protected
Protected
Protected
Protected
Unprotected Blocks
Protected
Writable
Writable
Writable
Status Register
Protected
Writable
Protected
Writable
DS21230E-page 12
1997-2012 Microchip Technology Inc.
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