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29F040 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
Manufacturer
29F040 Datasheet PDF : 31 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
M29F040
Figure 2A. LCC Pin Connections
A7
A6
A5
A4
A3 9
A2
A1
A0
DQ0
1 32
M29F040
17
A14
A13
A8
A9
25 A11
G
A10
E
DQ7
AI01378
Figure 2B. TSOP Pin Connections
A11
A9
A8
A13
A14
A17
W
VCC
A18
A16
A15
A12
A7
A6
A5
A4
1
32
8 M29F040 25
9 (Normal) 24
16
17
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
AI01379
Figure 2C. TSOP Reverse Pin Connections
G
A10
E
DQ7
DQ6
DQ5
DQ4
DQ3
VSS
DQ2
DQ1
DQ0
A0
A1
A2
A3
1
32
8 M29F040 25
9 (Reverse) 24
16
17
AI01174B
A11
A9
A8
A13
A14
A17
W
VCC
A18
A16
A15
A12
A7
A6
A5
A4
2/31
DESCRIPTION
The M29F040 is a non-volatile memory that may
be erased electrically at the block level, and pro-
grammed Byte-by-Byte.
The interface is directly compatible with most mi-
croprocessors. PLCC32 and TSOP32 (8 x 20mm)
packages are available. Both normal and reverse
pin outs are available for the TSOP32 package.
Organisation
The Flash Memory organisation is 512K x8 bits with
Address lines A0-A18 and Data Inputs/Outputs
DQ0-DQ7. Memory control is provided by Chip
Enable, Output Enable and Write Enable Inputs.
Erase and Program are performed through the
internal Program/Erase Controller (P/E.C.).
Data Outputs bits DQ7 and DQ6 provide polling or
toggle signals during Automatic Program or Erase
to indicate the Ready/Busy state of the internal
Program/Erase Controller.
Memory Blocks
Erasure of the memory is in blocks. There are 8
uniform blocks of 64 Kbytes each in the memory
address space. Each block can be programmed
and erased over 100,000 cycles. Each uniform
block may separately be protected and unpro-

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