AS6UA25616-BC View Datasheet(PDF) - Alliance Semiconductor

Part Name

Description

Manufacturer

AS6UA25616-BC

2.3V to 3.6V 256K×16 Intelliwatt™ low-power CMOS SRAM with one chip enable

Alliance Semiconductor 

AS6UA25616

Read cycle (over the operating range)3,9

–55

Parameter

Symbol Min

Max

Read cycle time

tRC

55

–

Address access time

tAA

–

55

Chip enable (CS) access

time

tACS

–

55

Output enable (OE) access

time

tOE

–

25

Output hold from address

change

tOH

10

–

CS low to output in low Z tCLZ

10

–

CS high to output in high Z tCHZ

0

20

OE low to output in low Z tOLZ

5

–

UB/LB access time

tBA

–

55

UB/LB low to low Z

tBLZ

10

–

UB/LB high to high Z

tBHZ

0

20

OE high to output in high Z tOHZ

0

20

Power up time

tPU

0

–

Power down time

tPD

–

55

®

–70

Min

Max Unit

70

–

ns

–

70

ns

–

70

ns

–

35

ns

10

–

ns

10

–

ns

0

20

ns

5

–

ns

–

70

ns

10

–

ns

0

20

ns

0

20

ns

0

–

ns

–

70

ns

Notes

3

3

5

4, 5

4, 5

4, 5

4, 5

4, 5

4, 5

4, 5

4, 5

Key to switching waveforms

Rising input

Read waveform 1 (address controlled)3,6,7,9

Falling input

tRC

Address

tOH

tAA

DOUT

Previous data valid

Read waveform 2 (CS, OE, UB, LB controlled)3,6,8,9

tRC

Address

tAA

OE

tOE

tOLZ

CS

tACS

tLZ

LB, UB

DOUT

tBLZ

tBA

Undefined/don’t care

tOH

Data valid

Data valid

tOH

tOHZ

tHZ

tBHZ

4

ALLIANCE SEMICONDUCTOR

10/6/00

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