M69897VP View Datasheet(PDF) - MITSUBISHI ELECTRIC

Part Name

Description

Manufacturer

M69897VP

16:1 2.488 Gbps Multiplexer

MITSUBISHI ELECTRIC  

PCLKOP

PDI[15:0]

TD S 2

TD H 2

Figure 14 Input Timing (SELPLL = "L")

SCLKOP

SDOP/N

TSD

D15

D14

D13

D1

D0

Figure 15 Output Timing

PIN NAME

LPF_EXT1

LPF_EXT2

PDI[15:0]

SCLKIP

SCLKIN

PCLKIP

PCLKIN

PARITYI

SDOP

SDON

SCLKOP

SCLKON

PCLKOP

PCLKON

PARIERRO

SELPLL

NC

LEVEL

-

Single-Ended PECL

Differential PECL

Differential PECL

Single-Ended PECL

Differential PECL

Differential PECL

Differential PECL

Single-Ended PECL

CMOS

-

Table 10 Input/Output Pin Assignment

I/O

PIN #

22

-

21

I

Table 11

29

I

30

12

I

13

I

11

38

O

37

41

O

40

52

O

51

O

53

I

20

-

26,47,54

DESCRIPTION

Loop filter pins. (See Figure 16.)

Received parallel data input.

Serial reference clock input.

( Used for Internal PLL off-state mode only.)

Reference clock input.

Used for parity check.

Differential serial data output.

Differential serial clock output.

Differential parallel clock output.

Parity error output.

High: Internal PLL operating mode.

No connect. Leave open.

8

MITSUBISHI ELECTRIC December 2000

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