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56F8355 View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
56F8355
Freescale
Freescale Semiconductor Freescale
56F8355 Datasheet PDF : 172 Pages
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Signal Pins
Table 2-2 Signal and Package Information for the 128-Pin LQFP (Continued)
Signal Name Pin No. Type
State
During
Reset
Signal Description
CLKO
6
Output
In reset, Clock Output — This pin outputs a buffered clock signal. Using
output is the SIM CLKO Select Register (SIM_CLKOSR), this pin can be
disabled programmed as any of the following: disabled, CLK_MSTR
(system clock), IPBus clock, oscillator output, prescaler clock and
postscaler clock. Other signals are also available for test
purposes.
See Part 6.5.7 for details.
A8
15
Output
In reset, Address Bus — A8 - A13 specify six of the address lines for
output is external program or data memory accesses. Depending upon the
disabled, state of the DRV bit in the EMI bus control register (BCR), A8 -
pullup is A13 and EMI control signals are tri-stated when the external bus is
enabled inactive.
(GPIOA0)
A9
(GPIOA1)
A10
(GPIOA2)
A11
(GPIOA3)
A12
(GPIOA4)
A13
(GPIOA5)
GPIOB0
Schmitt
Input/
16
Output
17
18
19
20
Port A GPIO — These six GPIO pins can be individually
programmed as input or output pins.
After reset, these pins default to address bus functionality and
must be programmed as GPIO.
To deactivate the internal pullup resistor, clear the appropriate
GPIO bit in the GPIOA_PUR register.
Example: GPIOA0, clear bit 0 in the GPIOA_PUR register.
Note: Primary function is not available in this package
configuration; GPIO function must be used instead.
27
Schmitt
Input,
Port B GPIO — These four GPIO pins can be programmed as
Input/
pullup
input or output pins.
Output
enabled
(A16)
GPIOB1
(A17)
GPIOB2
(A18)
GPIOB3
(A19)
Output
28
29
30
Address Bus — A16 - A19 specify four of the address lines for
external program or data memory accesses. Depending upon the
state of the DRV bit in the EMI bus control register (BCR), A16 -
A19 and EMI control signals are tri-stated when the external bus is
inactive.
After reset, the default state is GPIO.
To deactivate the internal pullup resistor, clear bit 0 in the
GPIOB_PUR register.
Example: GPIOB1, clear bit 1 in the GPIOB_PUR register.
56F8355 Technical Data, Rev. 17
Freescale Semiconductor
21
Preliminary

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