DSP56852 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56852

16-bit Digital Signal Controllers

Freescale Semiconductor 

Introduction

Table 3-1. 56852 Signal and Package Information for the 81-pin MAPBGA (Continued)

Pin No.

C4

Signal Name

MISO

Type

Input/Output

Description

SPI Master In/Slave Out (MISO)—This serial data pin is an input to a

master device and an output from a slave device. The MISO line of a

slave device is placed in the high-impedance state if the slave device is

not selected.

GPIOC4

Input/Output

Port C GPIO (4)—This pin is a General Purpose I/O (GPIO) pin that

can individually be programmed as input or output pin.

SRCK

Input/Output

SSI Serial Receive Clock (SRCK)—This bidirectional pin provides the

serial bit rate clock for the receive section of the SSI. The clock signal

can be continuous or gated.

C5

MOSI

Input/

SPI Master Out/Slave In (MOSI)—This serial data pin is an output from

Output (Z) a master device and an input to a slave device. The master device

places data on the MOSI line a half-cycle before the clock edge that the

slave device uses to latch the data.

GPIOC5

Input/Output

Port C GPIO (5)—This pin is a General Purpose I/O (GPIO) pin that

can individually be programmed as input or output pin.

SRFS

Input/Output

SSI Serial Receive Frame Sync (SRFS)— This bidirectional pin is

used to count the number of words in a frame while receiving. A

programmable frame rate divider and a word length divider are used for

frame rate sync signal generation.

A1

IRQA

Input

External Interrupt Request A (IRQA)—The IRQA Schmitt trigger input

is a synchronized external interrupt request that indicates that an

external device is requesting service. It can be programmed to be

level-sensitive or negative-edge- triggered.

C2

IRQB

Input

External Interrupt Request B (IRQB)—The IRQB Schmitt trigger input

is an external interrupt request that indicates that an external device is

requesting service. It can be programmed to be level-sensitive or

negative-edge-triggered.

A6

EXTAL

Input

External Crystal Oscillator Input (EXTAL)—This input should be

connected to an external crystal. If an external clock source other than a

crystal oscillator is used, EXTAL must be tied off.

A7

XTAL

Input/Output Crystal Oscillator Output (XTAL)—This output connects the internal

crystal oscillator output to an external crystal. If an external clock source

other than a crystal oscillator is used, XTAL must be used as the input.

56852 Technical Data, Rev. 8

Freescale Semiconductor

13

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