DSP56854E View Datasheet(PDF) - Freescale Semiconductor
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DSP56854E Datasheet PDF : 60 Pages
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Table 3-1. 56854 Signal and Package Information for the 128-pin LQFP (Continued)
Pin No.
Signal Name
Type
Description
15
MODA
Input
Mode Select (MODA)—During the bootstrap process MODA
selects one of the eight bootstrap modes.
GPIOH0
Input/Output
Port H GPIO (0)—This pin is a General Purpose I/O (GPIO) pin
after the bootstrap process has completed.
16
MODB
Input
Mode Select (MODB)—During the bootstrap process MODB
selects one of the eight bootstrap modes.
GPIOH1
Input/Output
Port H GPIO (1)—This pin is a General Purpose I/O (GPIO) pin
after the bootstrap process has completed.
17
MODC
Input
Mode Select (MODC)—During the bootstrap process MODC
selects one of the eight bootstrap modes.
GPIOH2
Input/Output
Port H GPIO (2)—This pin is a General Purpose I/O (GPIO) pin
after the bootstrap process has completed.
35
RESET
Input
Reset (RESET)—This input is a direct hardware reset on the
processor. When RESET is asserted low, the device is initialized
and placed in the Reset state. A Schmitt trigger input is used for
noise immunity. When the RESET pin is deasserted, the initial chip
operating mode is latched from the MODA, MODB, and MODC
pins.
To ensure complete hardware reset, RESET and TRST should be
asserted together. The only exception occurs in a debugging
environment when a hardware reset is required and it is necessary
not to reset the JTAG/Enhanced OnCE module. In this case, assert
RESET, but do not assert TRST.
34
RSTO
Output
Reset Output (RSTO)—This output is asserted on any reset
condition (external reset, low voltage, software or COP).
65
RXD0
Input
Serial Receive Data 0 (RXD0)—This input receives byte-oriented
serial data and transfers it to the SCI 0 receive shift register.
GPIOE0
Input/Output
Port E GPIO (0)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
66
TXD0
Output(Z)
Serial Transmit Data 0 (TXD0)—This signal transmits data from
the SCI 0 transmit data register.
GPIOE1
Input/Output
Port E GPIO (1)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
94
RXD1
Input
Serial Receive Data 1 (RXD1)—This input receives byte-oriented
serial data and transfers it to the SCI 1 receive shift register.
GPIOE2
Input/Output
Port E GPIO (2)—This pin is a General Purpose I/O (GPIO) pin that
can individually be programmed as input or output pin.
56854 Technical Data, Rev. 6
18
Freescale Semiconductor
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