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DSP56854E View Datasheet(PDF) - Freescale Semiconductor

Part Name
Description
Manufacturer
DSP56854E
Freescale
Freescale Semiconductor Freescale
DSP56854E Datasheet PDF : 60 Pages
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56854 Description
• JTAG/Enhanced On-Chip Emulation (EOnCE) for unobtrusive, real-time debugging
• Six (6) independent channels of DMA
• 8-bit Parallel Host Interface*
• Time of Day
• Up to 41 GPIO
* Each peripheral I/O can be used alternately as a General Purpose I/O if not needed
1.1.4 Energy Information
• Fabricated in high-density CMOS with 3.3V, TTL-compatible digital inputs
• Wait and Stop modes available
1.2 56854 Description
The 56854 is a member of the 56800E core-based family of controllers. It combines, on a single chip, the
processing power of a Digital Signal Processor (DSP) and the functionality of a microcontroller with a
flexible set of peripherals to create an extremely cost-effective solution. Because of its low cost,
configuration flexibility, and compact program code, the 56854 is well-suited for many applications. The
56854 includes many peripherals that are especially useful for low-end Internet appliance applications and
low-end client applications such as telephony; portable devices; Internet audio; and point-of-sale systems,
such as noise suppression; ID tag readers; sonic/subsonic detectors; security access devices; remote
metering; sonic alarms.
The 56800E core is based on a Harvard-style architecture consisting of three execution units operating in
parallel, allowing as many as six operations per instruction cycle. The microprocessor-style programming
model and optimized instruction set allow straightforward generation of efficient, compact DSP and
control code. The instruction set is also highly efficient for C Compilers, enabling rapid development of
optimized control applications.
The 56854 supports program execution from either internal or external memories. Two data operands can
be accessed from the on-chip Data RAM per instruction cycle. The 56854 also provides two external
dedicated interrupt lines, and up to 41 General Purpose Input/Output (GPIO) lines, depending on
peripheral configuration.
The 56854 controller includes 16K words of Program RAM, 16K words of Data RAM, and 1K words of
Boot ROM. It also supports program execution from external memory.
This controller also provides a full set of standard programmable peripherals that include an 8-bit parallel
Host Interface, Enhanced Synchronous Serial Interface (ESSI), one Serial Peripheral Interface (SPI), two
Serial Communications Interfaces (SCIs), and a Quad Timer. The Host Interface, ESSI, SPI, SCI, four chip
selects and quad timer can be used as General Purpose Input/Outputs (GPIOs) if its primary function is not
required.
56854 Technical Data, Rev. 6
Freescale Semiconductor
5

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