DSP56855E View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

DSP56855E

16-bit Digital Signal Controllers

Freescale Semiconductor 

56855 General Description

• 120 MIPS at 120MHz

• 24K x 16-bit Program SRAM

• 24K x 16-bit Data SRAM

• 1K x 16-bit Boot ROM

• Access up to 2M words of program memory or 8M

words of data memory

• Chip Select Logic for glueless interface to ROM and

SRAM

• Six (6) independent channels of DMA

• Enhanced Synchronous Serial Interface (ESSI)

• Two (2) Serial Communication Interfaces (SCI)

• General Purpose 16-bit Quad Timer with 1 external pin

• JTAG/Enhanced On-Chip Emulation (OnCE™) for

unobtrusive, real-time debugging

• Computer Operating Properly (COP)/Watchdog Timer

• Time-of-Day (TOD)

• 100 LQFP package

• Up to 18 GPIO

Memory

Program Memory

24,576 x 16 SRAM

Boot ROM

1024 x 16 ROM

Data Memory

24,576 x 16 SRAM

6

JTAG/

Enhanced

OnCE

VDDIO

10

VDD VSSIO VSS VDDA VSSA

4

10 4

16-Bit

DSP56800E Core

Program Controller

and

Hardware Looping Unit

Address

Generation Unit

Data ALU

16 x 16 + 36 → 36-Bit MAC

Three 16-bit Input Registers

Four 36-bit Accumulators

Bit

Manipulation

Unit

PAB

PDB

CDBR

CDBW

XDB2

XAB1

XAB2

PAB

PDB

CDBR

CDBW

System

Bus

Control

DMA

6 channel

Core CLK

IPBus Bridge (IPBB)

Decoding

Peripherals

A0-20 [20:0]

D0-D15 [15:0]

RD Enable

WR Enable

CS0-CS3[3:0] or

GPIOA0-GPIOA3[3:0]

External Address

Bus Switch

External Data

Bus Switch

Bus Control

External Bus

Interface Unit

2 SCI ESSI0

or

or

GPIOE GPIOC

4

6

Quad

Timer

or

GPIOG

Interrupt

Controller

IRQA

IRQB

56855 Block Diagram

COP/

Watch-

dog

POR

IPBus CLK

3

System

COP/TOD CLK Integration

Module

CLKO

MODEA-C or

(GPIOH0-H2)

RSTO

RESET

Time

of

Day

Clock

Generator

OSC PLL

EXTAL

XTAL

56855 Technical Data, Rev. 6

Freescale Semiconductor

3

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