74LVC257ADB View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

74LVC257ADB

Quad 2-input multiplexer with 5 Volt tolerant inputs/outputs (3-State)

Philips Electronics 

Philips Semiconductors

Quad 2-input multiplexer with 5 Volt tolerant

inputs/outputs (3-State)

Product specification

74LVC257A

FEATURES

• Wide supply voltage range of 1.2 to 3.6 V

• In accordance with JEDEC standard no. 8-1A

• CMOS lower power consumption

• Direct interface with TTL levels

• Output drive capability 50 W transmission lines at 85°C

• 5 Volt tolerant inputs/outputs, for interfacing with 5 Volt logic

DESCRIPTION

The 74LVC257A is a high-performance, low-power, low-voltage,

Si-gate CMOS device and superior to most advanced CMOS

compatible TTL families.

Inputs can be driven from either 3.3V or 5.0V devices. In 3-State

operation, outputs can handle 5V. This feature allows the use of

these devices as translators in a mixed 3.3V/5V environment.

The 74LVC257A is a quad 2-input multiplexer with 3-state outputs,

which select 4 bits of data from two sources and are controlled by a

common data select input (S). The data inputs from source 0 (1l0 to

4l0) are selected when input S is LOW and the data inputs from

source 1 (1l1 to 4l1) are selected when S in HIGH. Data appears at the

outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.

The 74LVC257A is the logic implementation of a 4-pole, 2-position

switch, where the position of the switch is determined by the logic

levels applied to S. The outputs are forced to a high impedance

OFF-state when OE is HIGH.

QUICK REFERENCE DATA

GND = 0 V; Tamb = 25°C; tr =tf ≤ 2.5 ns

SYMBOL

PARAMETER

CONDITIONS

tPHL/tPLH

Propagation delay

nl0, nl1 to nY

S to nY

CL = 50 pF;

VCC = 3.3 V

CI

Input capacitance

CPD

Power dissipation capacitance per channel VI = GND to VCC1

NOTE:

1. CPD is used to determine the dynamic power dissipation (PD in µW)

PD = CPD × VCC2 × fi )ȍ (CL × VCC2 × fo) where:

fi = input frequency in MHz; CL = output load capacitance in pF;

fo = output frequency in MHz; VCC = supply voltage in V;

ȍ (CL × VCC2 × fo) = sum of the outputs.

TYPICAL

3.9

3.5

5.0

30

ORDERING INFORMATION

PACKAGES

16-Pin Plastic SO

16-Pin Plastic SSOP Type II

16-Pin Plastic TSSOP Type I

TEMPERATURE RANGE OUTSIDE NORTH AMERICA

–40°C to +85°C

74LVC257A D

–40°C to +85°C

74LVC257A DB

–40°C to +85°C

74LVC257A PW

NORTH AMERICA

74LVC257A D

74LVC257A DB

74LVC257APW DH

UNIT

ns

pF

pF

PKG. DWG. #

SOT109-1

SOT338-1

SOT403-1

PIN CONFIGURATION

LOGIC SYMBOL

S1

1I0 2

1I1 3

IY 4

2l0 5

2l1 6

2Y 7

GND 8

16 VCC

15 OE

14 4l0

13 4l1

12 4Y

11 3l0

10 3l1

9 3Y

SV00636

2 3 5 6 11 10 14 13

1I0 11I 2I0 2I1 3I0 3I1 4I0 4I1

1

S

15

OE

1Y 2Y 3Y 4Y

4 7 9 12

SV00637

1998 Jul 29

2

853-2101 19802

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