4. Register structure
The view of the register structure is described below:
XXX register (address XX16)
✽5
✽2
✽1
b7 b6 b5 b4 b3 b2 b1 b0
X0
Bit
0
1
2
3
4
5
6
7
✽1
✽2
✽3
✽4
Bit name
• • • select bit
• • • select bit
• • • flag
Fix this bit to “0.”
This bit is invalid in … mode.
Nothing is assigned.
The value is “0” at reading.
✽6
Function
0:…
1:…
The value is “0” at reading.
b2 b1
00:…
01:…
10:…
11:…
0:…
1:…
At reset R/W ✽3
Undefined WO
0
RW
0
RW
0
RO
0
RW
0
RW
Undefined —
0
—
✽4
Blank
0
1
✕
: Set to “0” or “1” according to the usage.
: Set to “0” at writing.
: Set to “1” at writing.
: Invalid depending on the mode or state. It may be “0” or “1.”
: Nothing is assigned.
0
1
Undefined
: “0” immediately after reset.
: “1” immediately after reset.
: Undefined immediately after reset.
RW
: It is possible to read the bit state at reading. The written value becomes valid.
RO
: It is possible to read the bit state at reading. The written value becomes invalid. Accordingly, the written
value may be “0” or “1.”
WO
: The written value becomes valid. It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See ✽5 above.)
—
: It is impossible to read the bit state. The value is undefined at reading.
However, when [“0” at reading”] is indicated in the “Function” or “Note” column, the bit is always “0” at
reading. (See ✽6 above.)
The written value becomes invalid. Accordingly, the written value may be “0” or “1.”
Invalid for that function or mode.
2