A8504 View Datasheet(PDF) - Allegro MicroSystems

Part Name

Description

Manufacturer

A8504

WLED/RGB Backlight Driver for Medium Size LCDs

Allegro MicroSystems 

A8504

WLED/RGB Backlight Driver for Medium Size LCDs

Application Information

Design Example

This section provides a method for selecting component values

when designing an application using the A8504.

Assumptions For the purposes of this example, the following are

given as the application requirements:

• VBAT: 8 to 21 V

• VIN: 5 V

• Quantity of LED channels: 6

• Quantity of LEDs per channel: 8

• LED current per channel, ILED: 40 mA

• Vf at 40 mA: 3 to 3.4 V

• fSW: 2 MHz

• TA(max): 65°C

Dimming Use a 100 Hz PWM signal on the PWM pin. The

A8504 can work with wide range of PWM frequencies, taking

about 6 μs typical (10 μs maximum) to turn on. This delay may

have a noticeable effect at high PWM frequencies combined with

low duty cycles. For example, at 100 Hz and 10% duty cycle, the

PWM on-period is 1 ms. In that period, a delay of 6 μs causes

only a 0.6% error. If the PWM frequency is 1 kHz, this error

is 6%. However, error due to turn-on delay can be nullified by

increasing the applied PWM duty cycle.

Procedure The procedure consists of selecting the appropriate

configuration and then the individual component values, in an

ordered sequence.

1. Identify the SELx pins to use. For 6 channels:

• connect pins SEL1 and SEL3 to VIN

• connect pin SEL2 to AGND

2. Connect LEDs to pins LED1 through LED6 (leave pins

LED7 and LED8 open).

3. Select resistor RISET (connected between pin ISET and

AGND). Given ILED = 40 mA and VISET = 1.23 V typical,

then:

RISET = 1.23 / (40/460) = 14.2 kΩ .

(1)

Select a common value: 14.3 kΩ, 1%.

4. Select resistor RFSET (connected between pin FSET and

AGND). Given:

RFSET = 26.03 /fSW ,

(2)

for a 2 MHz switching frequency, select:

RFSET = 26.03 / 2 = 13 kΩ .

5. Select resistor ROVP (connect to the OVP pin to set the OVP

level, VOUT(max)). Given Vf (max) = 3.4 V, then:

VOUT(max) = 3.4 × 8 + 0.5 = 27.7 V .

(3)

With a 15% margin, to set the output OVP level, given an

IOVPH of 49 μA typical, and VOVP = 30 V:

ROVP = (32 – 30) / 49 = 40.8 kΩ .

(4)

Select a common value: 41.2 kΩ.

6. Select inductor L1. This should assume a maximum duty

cycle, D(max), at VBAT(min) and 90% efficiency.

D = 1– (VBAT × η) / VOUT

(5)

D(max) = 1– (8 × 0.9) / 27.7 = 74% .

Then calculate maximum switch on-time:

ton(max) = D(max) / fSW

(6)

= 0.74 / 2 MHz = 370 ns .

Maximum input current can be calculated as:

IBAT = (VOUT × IOUT) / (VBAT(min) × η)

(7)

IBAT(max) = [27.7 (40 × 6)] / (8 × 0.9) = 923 mA .

Set inductor ripple at 60% of IBAT(max):

∆IL = 0.6 × 923 = 554 mA

Given, during switch on-time:

VBAT = L × ∆IL × fSW / D

(8)

8 = L × 0.554 × 2 / 0.74, and

L = 5.3 μH .

Select a common value, 6.8 μH.

It is recommended to select an inductor that can handle a DC

current level that is greater than 923 mA, at the peak current

level (saturation) of 923 mA + 554 / 2 = 1200 mA. This is

to ensure that the inductor does not saturate at any steady

state or transient condition, within specified temperature and

tolerance ranges. Inductor saturation level decreases with

increasing temperature. It is advisable to use a inductor with

a saturation level of 1.6 A, because the switch current limit

is 1.8 A typical. The inductor should have a minimum DC

resistance and core loss for better efficiency.

Allegro MicroSystems, Inc.

11

115 Northeast Cutoff

Worcester, Massachusetts 01615-0036 U.S.A.

1.508.853.5000; www.allegromicro.com

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