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Part Name
Description
AD1871 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD1871
Stereo Audio, 24-Bit, 96 kHz, Multibit ADC
Analog Devices
AD1871 Datasheet PDF : 28 Pages
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DATA INTERFACE TIMING (STANDALONE MODE–MASTER)
Mnemonic
t
BDLY
t
BLDLY
t
BDDLY
Description
BCLK Delay
LRCLK Delay to Low
DOUT Delay
Min
Typ
Max
20
10
10
Unit
ns
ns
ns
Comment
From MCLK Rising
From BCLK Falling
From BCLK Falling
AD1871
MCLK
t
BDLY
BCLK
t
BLDLY
LRCLK
DOUT
LEFT-JUSTIFIED
MODE
t
BDDLY
MSB
MSB–1
DOUT
I
2
S-JUSTIFIED
MODE
MSB
DOUT
RIGHT-JUSTIFIED
MODE
MSB
LSB
8-BIT CLOCKS
(24-BIT DATA)
12-BIT CLOCKS
(20-BIT DATA)
16-BIT CLOCKS
(16-BIT DATA)
Figure 2. Master Data Interface Timing
REV. 0
–5–
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