AD5342 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD5342
Analog Devices
AD5342 Datasheet PDF : 20 Pages
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AD5332/AD5333/AD5342/AD5343
AD5333 FUNCTIONAL BLOCK DIAGRAM
BUF
GAIN
DB... 9
DB0
CS
WR
A0
CLR
LDAC
VREFA
POWER-ON
RESET
INPUT
REGISTER
DAC
REGISTER
INTER-
FACE
LOGIC
INPUT
REGISTER
DAC
REGISTER
RESET
10-BIT
DAC
10-BIT
DAC
VREFB
VDD
AD5333
BUFFER
VOUTA
BUFFER
VOUTB
POWER-DOWN
LOGIC
PD GND
AD5333 PIN CONFIGURATION
GAIN 1
24 DB9
BUF 2
23 DB8
VREFB 3
22 DB7
VREFA 4
VOUTA 5
10-BIT
AD5333
21 DB6
20 DB5
VOUTB 6 TOP VIEW 19 DB4
GND 7 (Not to Scale) 18 DB3
CS 8
17 DB2
WR 9
16 DB1
A0 10
15 DB0
CLR 11
LDAC 12
14 VDD
13 PD
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15–24
Mnemonic
GAIN
BUF
VREFB
VREFA
VOUTA
VOUTB
GND
CS
WR
A0
CLR
LDAC
PD
VDD
DB0–DB9
AD5333 PIN FUNCTION DESCRIPTIONS
Function
Gain Control Pin. This controls whether the output range from the DAC is 0–VREF or 0–2 VREF.
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
Reference input for DAC B.
Reference input for DAC A.
Output of DAC A. Buffered output with rail-to-rail operation.
Output of DAC B. Buffered output with rail-to-rail operation.
Ground reference point for all circuitry on the part.
Active Low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
Address pin for selecting between DAC A and DAC B.
Asynchronous active-low control input that clears all input registers and DAC registers to zeros.
Active-low control input that updates the DAC registers with the contents of the input registers. This
allows all DAC outputs to be simultaneously updated.
Power-Down Pin. This active low control pin puts all DACs into power-down mode.
Power Supply Pin. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 F capacitor in parallel with a 0.1 F capacitor to GND.
10 Parallel Data Inputs. DB9 is the MSB of these 10 bits.
–6–
REV. 0
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