CS5322(2005) View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CS5322
(Rev.:2005)

24-bit, Variable-bandwidth A/D Converter Chipset

Cirrus Logic 

CS5321/22

CS5321 SWITCHING CHARACTERISTICS (TA = (See Note 1); Vdd1, Vdd2 = 5 V ± 5%; Vss1,

Vss2 = -5 V ± 5%; Inputs: Logic 0 = 0 V Logic 1 = V+; CL = 50 pF (Note 15))

MCLK Frequency

MCLK Duty Cycle

Parameter

Symbol

(Note 16)

fc

Min

0.250

40

Typ

1.024

-

Max Units

1.2 MHz

60

%

MCLK Jitter (In-band)

-

-

300

ps

Rise Times:

Any Digital Input

(Note 17) trisein

-

Any Digital Output

triseout

-

-

100

ns

50

200

ns

Fall Times:

Any Digital Input

(Note 17) tfallin

-

-

100

ns

Any Digital Output

tfallout

-

50

200

ns

MSYNC Setup Time to MCLK rising

tmss

20

-

-

ns

MSYNC Hold Time after MCLK rising

tmsh

20

-

-

ns

MCLK rising to Valid MFLG

tmfh

-

140

255

ns

MCLK rising to Valid MDATA

tmdv

-

170

300

ns

Notes: 15. Guaranteed by design, characterization, or test.

16. If MCLK is removed, the modulator will enter the power down mode.

17. Excludes MCLK input. MCLK should be driven with a signal having rise and fall times of 25 ns or faster.

t risein

t fallin

4.0 V

1.0 V

t riseout

Figure 1. Rise and Fall Times

t fallout

4.6 V

0.4 V

MCLK

MSYNC

t mss

MDATA

MFLG

6

t msh

t mdv

VALID DATA

t mdv

VALID DATA

t mfh

Figure 2. CS5321 Interface Timing, HBR=1

DS454F2

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