AD7151 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD7151 Datasheet PDF : 28 Pages
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AD7151
ARCHITECTURE AND MAIN FEATURES
3.3V
VDD
CLOCK
GENERATOR
POWER-DOWN
TIMER
POWER SUPPLY
MONITOR
SCL
CIN
Σ-Δ CDC
DIGITAL
FILTER
SERIAL
INTERFACE
PROGRAMMING
SDA INTERFACE
CX
EXC
CAPDAC
EXCITATION
THRESHOLD
AD7151
OUT
DIGITAL
OUTPUT
GND
Figure 20. AD7151 Block Diagram
The AD7151 core is a high performance capacitance-to-digital
converter (CDC) that allows the part to be interfaced directly to
a capacitive sensor.
The comparator compares the CDC result with thresholds, either
fixed or dynamically adjusted by the on-chip adaptive threshold
algorithm engine. Thus, the output indicates a defined change in
the input sensor capacitance.
The AD7151 also integrates an excitation source and CAPDAC
for the capacitive inputs, an input multiplexer, a complete clock
generator, a power-down timer, a power supply monitor, control
logic, and an I2C®-compatible serial interface for configuring the
part and accessing the internal CDC data and status, if required
in the system (see Figure 20).
CAPACITANCE-TO-DIGITAL CONVERTER
Figure 21 shows the CDC simplified functional diagram. The
converter consists of a second-order sigma delta (Σ-Δ), charge
balancing modulator and a third-order digital filter. The
measured capacitance CX is connected between an excitation
source and the Σ-Δ modulator input. The excitation signal is
applied on the CX during the conversion, and the modulator
continuously samples the charge going through the CX. The
digital filter processes the modulator output, which is a stream
of 0s and 1s containing the information in 0 and 1 density. The
data is processed by the adaptive threshold engine and output
comparators; the data can be also read through the serial interface.
The AD7151 is designed for floating capacitive sensors.
Therefore, both CX plates have to be isolated from ground or
any other fixed potential node in the system.
The AD7151 features slew rate limiting on the excitation voltage
output, which decreases the energy of higher harmonics on the
excitation signal and dramatically improves the system
electromagnetic compatibility (EMC).
CIN
CX
0pF TO 4pF
EXC
CAPACITANCE TO DIGITAL CONVERTER
(CDC)
CLOCK
GENERATOR
Σ-Δ
MODULATOR
0x000 TO 0xFFF
DATA
DIGITAL
FILTER
EXCITATION
Figure 21. CDC Simplified Block Diagram
CAPDAC
The AD7151 CDC core maximum full-scale input range is 4 pF.
However, the part can accept a higher capacitance on the input,
and the offset (nonchanging component) capacitance of up to 10
pF can be balanced by a programmable on-chip CAPDAC.
CIN
CSENS
10pF TO 14pF
EXC
CAPDAC
10pF
0x000 TO 0xFFF
DATA
0pF TO 4pF
CDC
Figure 22. Using CAPDAC
The CAPDAC can be understood as a negative capacitance
connected internally to the CIN pin. The CAPDAC has a 6-bit
resolution and a monotonic transfer function. Figure 22 shows
how to use the CAPDAC to shift the CDC 4 pF input range to
measure capacitance between 10 pF and 14 pF.
Rev. 0 | Page 10 of 28
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