AD7538 View Datasheet(PDF) - Analog Devices
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AD7538 Datasheet PDF : 16 Pages
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AD7538
CIRCUIT INFORMATION
EQUIVALENT CIRCUIT ANALYSIS
Figure 5 shows an equivalent circuit for the analog section
of the AD7538 DAC. The current source ILEAKAGE is composed
of surface and junction leakages. The RO resistor denotes the
equivalent output resistance of the DAC, which varies with
input code. COUT is the capacitance due to the current steering
switches and varies from about 90 pF to 180 pF (typical values)
depending upon the digital input. g(VREF, N) is the Thevenin
equivalent voltage generator due to the reference input voltage,
VREF, and the transfer function of the DAC ladder, N.
R/4
RFB
RO
IOUT
g (VREF, N)
ILEAKAGE
COUT
AGND
Figure 5. AD7538 Equivalent Analog Output Circuit
DIGITAL SECTION
The digital inputs are designed to be both TTL and 5 V CMOS
compatible. All logic inputs are static protected MOS gates with
typical input currents of less than 1 nA. To minimize power supply
currents, it is recommended that the digital input voltages be
driven as close as possible to 0 V and 5 V logic levels.
UNIPOLAR BINARY OPERATION (2-QUADRANT
MULTIPLICATION)
Figure 6 shows the circuit diagram for unipolar binary
operation. With an ac input, the circuit performs 2-quadrant
multiplication. The code table for Figure 6 is given in Table 6.
Capacitor C1 provides phase compensation and helps prevent
overshoot and ringing when high-speed op amps are used.
VIN
LDAC
CS
WR
R1
VDD
R2
20Ω
10Ω
1
VREF
20 LDAC
21 CS
22 WR
23
VDD
2
RFB
AD7538
IOUT 3
AGND 4
C1
33pF
A1
AD711
VO
DB13 TO DB0 DGND VSS
6
19
5
24
DIGITAL
INPUT DATA GND
C2
4.7µF
+
R3
1kΩ
R4
47kΩ
ANALOG
GND
–15V
Figure 6. Unipolar Binary Operation
Table 6. Unipolar Binary Code Table
Binary Number In
DAC Register
MSB
LSB
11 1111 1111 1111
10 0000 0000 0000
00 0000 0000 0001
00 0000 0000 0000
Analog Output, VOUT
−VIN(16,383/16,384)
−VIN(8192/16,384) = −½VIN
−VIN(1/16,384)
0V
For zero offset adjustment, the DAC register is loaded with
all 0s and amplifier offset (VOS) adjusted so that VOUT is 0 V.
Adjusting VOUT to 0 V is not necessary in many applications,
but it is recommended that VOS be no greater than (25 × 10−6)
(VREF) to maintain specified DAC accuracy (see the Application
Hints section).
Full-scale trimming is accomplished by loading the DAC
register with all 1s and adjusting R1 so that VOUTA = −VIN
(16,383/16,384). For high temperature operation, resistors
and potentiometers should have a low temperature coefficient.
In many applications, because of the excellent gain TC and
gain error specifications of the AD7538, gain error trimming is
not necessary. In fixed reference applications, full scale can also
be adjusted by omitting R1 and R2 and trimming the reference
voltage magnitude.
Rev. B | Page 10 of 16
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