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AD8222-EVAL View Datasheet(PDF) - Analog Devices

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AD8222-EVAL Datasheet PDF : 24 Pages
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AD8222
Differential Input Voltages at High Gains
When operating at high gain, large differential input voltages
can cause more than 6 mA of current to flow into the inputs.
This condition occurs when the differential voltage exceeds
the following critical voltage
VCRITICAL = (400 + RG) × (6 mA)
This is true for differential voltages of either polarity.
The maximum allowed differential voltage can be increased by
adding an input protection resistor in series with each input.
The value of each protection resistor should be
RPROTECT = (VDIFF_MAX VCRITICAL)/6 mA
RF INTERFERENCE
RF rectification is often a problem when amplifiers are used in
applications where there are strong RF signals. The disturbance
can appear as a small dc offset voltage. High frequency signals
can be filtered with a low-pass, RC network placed at the input
of the instrumentation amplifier, as shown in Figure 48. The
filter limits the input signal bandwidth according to the
following relationship.
FilterFreqDiff =
1
2π R(2CD + CC)
FilterFreqCM = 1
2π RCC
where CD ≥ 10CC.
+15V
R
4.02k
R
4.02k
0.1µF
CC
1nF
+IN
10µF
CD
R1
10nF 499
–IN
CC
1nF
AD8222
REF
VOUT
0.1µF
10µF
–15V
Figure 48. RFI Suppression
Figure 48 shows an example where the differential filter
frequency is approximately 2 kHz, and the common-mode filter
frequency is approximately 40 kHz.
Values of R and CC should be chosen to minimize RFI.
Mismatch between the R × CC at the positive input and the
R × CC at negative input degrades the CMRR of the AD8222. By
using a value of CD 10× larger than the value of CC, the effect of
the mismatch is reduced and performance is improved.
COMMON-MODE INPUT VOLTAGE RANGE
The three op amp architecture of the AD8222 applies gain and
then removes the common-mode voltage. Therefore, internal
nodes in the AD8222 experience a combination of both the
gained signal and the common-mode signal. This combined
signal can be limited by the voltage supplies even when the
individual input and output signals are not. Figure 7 and Figure 8
show the allowable common-mode input voltage ranges for
various output voltages, supply voltages, and gains.
Rev. 0 | Page 18 of 24

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