AD9125 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD9125

Dual, 16-Bit, 1000 MSPS, TxDAC+ Digital-to-Analog Converter

Analog Devices 

AD9125

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

CVDD18 1

DACCLKP 2

DACCLKN 3

CVSS 4

FRAME 5

NC 6

IRQ 7

D31 8

D30 9

NC 10

IOVDD 11

DVDD18 12

D29 13

D28 14

D27 15

D26 16

D25 17

D24 18

PIN 1

INDICATOR

AD9125

TOP VIEW

(Not to Scale)

54 RESET

53 CS

52 SCLK

51 SDIO

50 SDO

49 DVDD18

48 D0

47 D1

46 D2

45 D3

44 DVSS

43 DVDD18

42 D4

41 D5

40 D6

39 D7

38 D8

37 D9

NOTES

1. NC = NO CONNECT.

2. EXPOSED PAD MUST BE CONNECTED TO AVSS.

Figure 3. Pin Configuration

Table 8. Pin Function Descriptions

Pin No. Mnemonic

Description

1

CVDD18

1.8 V Clock Supply. Supplies clock receivers, clock distribution, and PLL circuitry.

2

DACCLKP

DAC Clock Input, Positive.

3

DACCLKN

DAC Clock Input, Negative.

4

CVSS

Clock Supply Common.

5

FRAME

Frame Input.

6

NC

No Connect

7

IRQ (INT)

Interrupt Request. Open Drain, Active Low Output. Connect external pull-up to IOVDD.

8

D31

Data Bit 31.

9

D30

Data Bit 30.

10

NC

No Connect.

11

IOVDD

Supply for Serial Port Pin, RESET Pin, and IRQ Pin. 1.8 V to 3.3 V can be applied to this pin.

12

DVDD18

1.8 V Digital Supply. Supplies power to digital core and digital data ports.

13

D29

Data Bit 29.

14

D28

Data Bit 28.

15

D27

Data Bit 27.

16

D26

Data Bit 26.

17

D25

Data Bit 25.

18

D24

Data Bit 24.

19

D23

Data Bit 23.

20

D22

Data Bit 22.

21

D21

Data Bit 21.

22

D20

Data Bit 20.

23

D19

Data Bit 19.

24

D18

Data Bit 18.

25

D17

Data Bit 17.

26

D16

Data Bit 16.

27

DCI

Data Clock Input.

Rev. 0 | Page 8 of 56

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