AD9250 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9250 Datasheet PDF : 45 Pages
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Data Sheet
Pin No.
Data Outputs
18
19
21
22
DUT Controls
10
31
32
33
34
Mnemonic
SERDOUT1+
SERDOUT1−
SERDOUT0−
SERDOUT0+
RST
SDIO
SCLK
CS
PDWN
AD9250
Type
Description
Output
Output
Output
Output
Lane B CML Output Data—True.
Lane B CML Output Data—Complement.
Lane A CML Output Data—Complement.
Lane A CML Output Data—True.
Input
Input/Output
Input
Input
Input
Digital Reset (Active Low).
SPI Serial Data I/O.
SPI Serial Clock.
SPI Chip Select (Active Low).
Power-Down Input (Active High). The operation of this pin
depends on the SPI mode and can be configured as power-
down or standby (see Table 18).
Rev. E | Page 13 of 45
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