AD9683 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9683 Datasheet PDF : 44 Pages
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Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9683
RFCLK 1
CLK– 2
CLK+ 3
AVDD 4
SYSREF+ 5
SYSREF– 6
AVDD 7
RST 8
AD9683
TOP VIEW
(Not to Scale)
24 DNC
23 PDWN
22 CS
21 SCLK
20 SDIO
19 FD
18 DGND
17 DVDD
NOTES
1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN.
2. THE EXPOSED THERMAL PAD ON THE BOTTOM OF THE
PACKAGE PROVIDES THE GROUND REFERENCE FOR
AVDD. THIS EXPOSED PAD MUST BE CONNECTED TO
AGND FOR PROPER OPERATION.
Figure 4. Pin Configuration (Top View)
Table 8. Pin Function Descriptions
Pin No.
Mnemonic
ADC Power Supplies
4, 7, 26, 27, 30, 31, 32
AVDD
10, 17
DVDD
9, 18
DGND
13
DRGND
14
DRVDD
Type
Supply
Supply
Ground
Ground
Supply
24
DNC
EPAD (AGND) Ground
ADC Analog
1
2
3
25
28
29
ADC Fast Detect Output
19
Digital Inputs
5
6
11
12
Data Outputs
15
16
RFCLK
CLK−
CLK+
VCM
VIN−
VIN+
Input
Input
Input
Output
Input
Input
FD
Output
SYSREF+
SYSREF−
SYNCINB+
SYNCINB−
Input
Input
Input
Input
SERDOUT0− Output
SERDOUT0+ Output
Description
Analog Power Supply (1.8 V Nominal).
Digital Power Supply (1.8 V Nominal).
Ground Reference for DVDD.
Ground Reference for DRVDD.
JESD204B PHY Serial Output Driver Supply (1.8 V Nominal). Note that
the DRVDD power is referenced to the AGND plane.
Do Not Connect.
Exposed Pad. The exposed thermal pad on the bottom of the package
provides the ground reference for AVDD. This exposed pad must be
connected to AGND for proper operation.
ADC RF Clock Input.
ADC Nyquist Clock Input—Complement.
ADC Nyquist Clock Input—True.
Common-Mode Level Bias Output for Analog Inputs. Decouple this
pin to ground using a 0.1 µF capacitor.
Differential Analog Input (−).
Differential Analog Input (+).
Fast Detect Indicator (CMOS Levels).
JESD204B LVDS SYSREF Input—True.
JESD204B LVDS SYSREF Input—Complement.
JESD204B LVDS Sync Input—True.
JESD204B LVDS Sync Input—Complement.
CML Output Data—Complement.
CML Output Data—True.
Rev. 0 | Page 11 of 44
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