AD9863 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
AD9863 Datasheet PDF : 40 Pages
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AD9863
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49
SPI_DIO 1
SPI_CLK 2
SPI_SDO 3
ADC_LO_PWR 4
DVDD 5
DVSS 6
AVDD 7
IOUT–A 8
IOUT+A 9
AGND 10
REFIO 11
FSADJ 12
AGND 13
IOUT+B 14
IOUT–B 15
AVDD 16
AD9863
TOP VIEW
(Not to Scale)
48 CLKIN1
47 CLKIN2
46 RESET
45 L0
44 L1
43 L2
42 L3
41 L4
40 L5
39 L6
38 L7
37 L8
36 L9
35 L10
34 L11
33 IFACE1
17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
Table 8. Pin Function Descriptions
Pin No.
Name1
1
SPI_DIO
(Interp1)
2
SPI_CLK
(Interp0)
3
SPI_SDO
(FD/HD)
4
ADC_LO_PWR
5, 31
DVDD, DRVDD
6, 32
DVSS, DRVDD
7, 16, 50, 51, 61 AVDD
8, 9
IOUT-A, IOUT+A
10, 13, 49, 53, 59 AGND, AVSS
11
REFIO
12
FSADJ
14, 15
IOUT+B, IOUT−B
17
IFACE2
(12/24)
18
IFACE3
19–30
U11–U0
33
IFACE1
34–45
46
47
48
52
L11–L0
RESET
CLKIN2
CLKIN1
REFB
Figure 3. Pin Configuration
Description2, 3
SPI: Serial Port Data Input.
No SPI: Tx Interpolation Pin, MSB.
SPI: Serial Port Shift Clock.
No SPI: Tx Interpolation Pin, LSB.
SPI: 4-Wire Serial Port Data Output
No SPI: Configures Full-Duplex or Half-Duplex Mode.
ADC Low Power Mode Enable. Defined at power-up.
Digital Supply.
Digital Ground.
Analog Supply.
DAC A Differential Output.
Analog Ground.
Tx DAC Band Gap Reference Decoupling Pin.
Tx DAC Full-Scale Adjust Pin.
DAC B Differential Output.
SPI: Buffered CLKIN. Can be configured as system clock output.
No SPI: For FD: Buffered CLKIN; For HD24 or HD12: 12/24 Configuration Pin.
Clock Output.
Upper Data Bit 11 to Upper Data Bit 0.
SPI: For FD: TxSYNC; For HD24, HD12, or Clone: Tx/Rx.
No SPI: FD >> TxSYNC; HD24 or HD12: Tx/Rx.
Lower Data Bit 11 to Lower Data Bit 0.
Chip Reset When Low.
Clock Input 2.
Clock Input 1
ADC Bottom Reference.
Rev. 0 | Page 8 of 40
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