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AD9925BBCZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9925BBCZ Datasheet PDF : 96 Pages
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AD9925
TABLE OF CONTENTS
Specifications..................................................................................... 3
Digital Specifications........................................................................ 4
Vertical Driver Specifications ......................................................... 5
Analog Specifications....................................................................... 6
Timing Specifications....................................................................... 7
Absolute Maximum Ratings............................................................ 8
Package Thermal Characteristics ............................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
Terminology .................................................................................... 11
Equivalent Circuits ......................................................................... 12
Typical Performance Characteristics ........................................... 13
System Overview ........................................................................ 14
Precision Timing High Speed Timing Generation.................. 15
Horizontal Clamping and Blanking......................................... 18
Horizontal Timing Sequence Example.................................... 21
Vertical Timing Generation...................................................... 22
Vertical Timing Example........................................................... 34
Shutter Timing Control ............................................................. 36
Example of Exposure and Readout of Interlaced Frame........... 41
FG_TRIG Operation.................................................................. 43
Analog Front End Description and Operation ...................... 45
Vertical Driver Signal Configuration ...................................... 47
Power-Up and Synchronization ............................................... 51
Standby Mode Operation .......................................................... 55
Circuit Layout Information....................................................... 57
Serial Interface Timing .............................................................. 59
Complete Listing for Register Bank 1.......................................... 62
Complete Listing for Register Bank 2.......................................... 66
Complete Listing for Register Bank 3.......................................... 87
Outline Dimensions ....................................................................... 94
Ordering Guide .......................................................................... 94
REVISION HISTORY
10/04—Data Sheet Changed from Rev. 0 to Rev. A
Changes to Specifications ........................................................................................3
Added Stress Disclaimer..........................................................................................8
Changes to Figure 12................................................................................................13
Changes to Figure 22................................................................................................18
Changes to Figure 55................................................................................................45
Change to DC Restore Section ...............................................................................45
Change to Correlated Double Sampler Section....................................................45
Change to ADC Section...........................................................................................46
Change to Digital Data Outputs Section ...............................................................46
Added Paragraph to Digital Data Outputs Section..............................................46
Changes to Table 34..................................................................................................55
Change to Circuit Layout Information Section....................................................57
Changes to Register Address Bank 1, Bank 2, and Bank 3 Section ...................60
Changes to Table 40..................................................................................................63
Change to Table 46 ...................................................................................................65
Changes to Tables 47–56, 58–73.............................................................................66
4/04—Revision 0: Initial Version
Rev. A | Page 2 of 96

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