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AD9958 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD9958 Datasheet PDF : 44 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9958
Parameter
Min
Residual Phase Noise @ 15.1 MHz (fOUT) with REFCLK
Multiplier Enabled 20×
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
Residual Phase Noise @ 40.1 MHz (fOUT) with REFCLK
Multiplier Enabled 20×
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
Residual Phase Noise @ 75.1 MHz (fOUT) with REFCLK
Multiplier Enabled 20×
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
Residual Phase Noise @ 100.3 MHz (fOUT) with REFCLK
Multiplier Enabled 20×
@ 1 kHz Offset
@ 10 kHz Offset
@ 100 kHz Offset
@ 1 MHz Offset
SERIAL PORT TIMING CHARACTERISTICS
Maximum Frequency Serial Clock (SCLK)
Minimum SCLK Pulse Width Low (tPWL)
1.6
Minimum SCLK Pulse Width High (tPWH)
2.2
Minimum Data Setup Time (tDS)
2.2
Minimum Data Hold Time
0
Minimum CS Setup Time (tPRE)
1.0
Minimum Data Valid Time for Read Operation
12
MISCELLANEOUS TIMING CHARACTERISTICS
MASTER_RESET Minimum Pulse Width
1
I/O_UPDATE Minimum Pulse Width
1
Minimum Setup Time (I/O_UPDATE to SYNC_CLK)
4.8
Minimum Hold Time (I/O_UPDATE to SYNC_CLK)
0
Minimum Setup Time (Profile Inputs to SYNC_CLK) 5.4
Minimum Hold Time (Profile Inputs to SYNC_CLK)
0
Minimum Setup Time (SDIO Inputs to SYNC_CLK)
2.5
Minimum Hold Time (SDIO Inputs to SYNC_CLK)
0
Propagation Time Between REF_CLK and SYNC_CLK 2.25
Profile Pin Toggle Rate
CMOS LOGIC INPUTS
VIH
2.0
VIL
Logic 1 Current
Logic 0 Current
Input Capacitance
CMOS LOGIC OUTPUTS
VOH
2.7
VOL
Typ
Max
−127
−136
−139
−138
−117
−128
−132
−130
−110
−121
−125
−123
−107
−119
−121
−119
200
3.5
5.5
2
0.8
3
12
−12
2
0.4
Unit
Test Conditions/Comments
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Sync
clocks
Min pulse width = 1 sync clock period
Min pulse width = 1 sync clock period
Rising edge to rising edge
Rising edge to rising edge
V
V
μA
μA
pF
1 mA load
V
V
Rev. A | Page 6 of 44

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