EV-ADF4159EB3Z View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
EV-ADF4159EB3Z
Analog Devices
EV-ADF4159EB3Z Datasheet PDF : 36 Pages
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Data Sheet
ADF4159
SPECIFICATIONS
AVDD = VP = 2.7 V to 3.45 V, DVDD = SDVDD = 1.8 V, AGND = DGND = SDGND = CPGND = 0 V, fPFD = 110 MHz, TA = TMIN to TMAX,
dBm referred to 50 Ω, unless otherwise noted.
Table 1.
Parameter1
RF CHARACTERISTICS
RF Input Frequency (RFIN)
Prescaler Output Frequency
REFERENCE CHARACTERISTICS
REFIN Input Frequency
Reference Doubler Enabled
REFIN Input Capacitance
REFIN Input Current
PHASE FREQUENCY DETECTOR (PFD)
Phase Detector Frequency2
CHARGE PUMP
ICP Sink/Source Current
High Value
Low Value
Absolute Accuracy
RSET Range
ICP Three-State Leakage Current
Sink and Source Matching
ICP vs. VCP
ICP vs. Temperature
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINH/IINL
Input Capacitance, CIN
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Output High Current, IOH
POWER SUPPLIES
AVDD
DVDD, SDVDD
VP
AIDD
DIDD
IP
Power-Down Mode
Min
Typ
0.5
10
10
4.8
300
2.5
4.59
5.1
1
2
2
2
1.4
DVDD − 0.4
2.7
1.62
1.8
2.7
26
7.5
5.5
2
Max
13
2
260
50
1.2
±100
110
5.61
0.4
±1
10
0.3
100
3.45
1.98
3.45
40
10
7
Unit
GHz
GHz
MHz
MHz
pF
µA
MHz
mA
µA
%
kΩ
nA
%
%
%
V
V
µA
pF
V
V
µA
V
V
V
mA
mA
mA
µA
Test Conditions/Comments
−10 dBm min to 0 dBm max; for lower
frequencies, ensure a slew rate ≥ 400 V/µs
For higher frequencies, use 8/9 prescaler
−5 dBm min to +9 dBm max biased at
1.8/2 (ac coupling ensures 1.8/2 bias); for
frequencies < 10 MHz, use a dc-coupled,
CMOS-compatible square wave with a
slew rate > 25 V/µs
Bit DB20 in Register R2 set to 1
Programmable
RSET = 5.1 kΩ
RSET = 5.1 kΩ
Sink and source current
0.5 V < VCP < VP − 0.5 V
0.5 V < VCP < VP − 0.5 V
VCP = VP/2
CMOS output selected
IOL = 500 µA
Supply current drawn by AVDD;
fPFD = 110 MHz
Supply current drawn by DVDD;
fPFD = 110 MHz
Supply current drawn by VP; fPFD = 110 MHz
Rev. B | Page 3 of 36
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