ADF7021-NDF View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADF7021-NDF Datasheet PDF : 64 Pages
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ADF7021-N
DIGITAL SPECIFICATIONS
Table 4.
Parameter
Min
Typ
Max
Unit Test Conditions/Comments
TIMING INFORMATION
Chip Enabled to Regulator Ready
10
μs CREG (1:4) = 100 nF
Chip Enabled to Tx Mode
32-bit register write time = 50 μs
TCXO Reference
1
ms
XTAL
2
ms
Chip Enabled to Rx Mode
32-bit register write time = 50 μs, IF filter coarse
calibration only
TCXO Reference
1.2
ms
XTAL
2.2
ms
Tx-to-Rx Turnaround Time
390 μs + (5 × tBIT)
Time to synchronized data out, includes AGC
settling (three AGC levels)and CDR synchronization;
see the AGC Information and Timing section for
more details; tBIT = data bit period
LOGIC INPUTS
Input High Voltage, VINH
0.7 × VDD
V
Input Low Voltage, VINL
0.2 × VDD V
Input Current, IINH/IINL
±1
μA
Input Capacitance, CIN
10
pF
Control Clock Input
50
MHz
LOGIC OUTPUTS
Output High Voltage, VOH
DVDD − 0.4
V
IOH = 500 μA
Output Low Voltage, VOL
0.4
V
IOL = 500 μA
CLKOUT Rise/Fall
5
ns
CLKOUT Load
10
pF
Rev. 0 | Page 9 of 64
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