ADF7021-V View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADF7021-V Datasheet PDF : 60 Pages
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ADF7021-V
DIGITAL SPECIFICATIONS
Table 4.
Parameter
Min
Typ
TIMING INFORMATION
Chip Enabled to Regulator
50
Ready
Chip Enabled to Tx Mode
TCXO Reference
1
XTAL
2
Chip Enabled to Rx Mode
Max
Unit
μs
ms
ms
TCXO Reference
XTAL
Tx-to-Rx Turnaround Time
1.2
ms
2.2
ms
AGC settling +
ms
(5 × tBIT)
LOGIC INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IINH/IINL
Input Capacitance, CIN
Control Clock Input
LOGIC OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
CLKOUT Rise/Fall Time
CLKOUT Load
0.7 × VDD
VDD2 − 0.4
V
0.2 × VDD V
±1
μA
10
pF
50
MHz
V
0.4
V
5
ns
10
pF
Test Conditions/Comments
CREG[1:4] = 100 nF
32-bit register write time = 50 μs
Depends on VCO settling
Depends on VCO settling
32-bit register write time = 50 μs, IF filter coarse
calibration only
Depends on VCO settling
Depends on VCO settling
Time to synchronized data output; includes AGC
settling (three AGC levels) and CDR synchronization;
tBIT = data bit period; AFC settling not included
IOH = 500 μA
IOL = 500 μA
Rev. 0 | Page 9 of 60
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