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ADL5374-EVALZ_ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
ADL5374-EVALZ_ Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
Preliminary Technical Data
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
ADL5370/1/2/3/4
1 COMM
2 COMM
3 VPS1
4 VPS1
5 VPS1
6 VPS1
FMOD
Exposed Paddle
VPS5 18
VPS4 17
VPS3 16
VPS2 15
VPS2 14
VOUT 13
Figure 2.
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
1,2,7,10,11,12,21,22 COMM
3,4,5,6,14,15,16,17,18 VPS1,VPS2,
VPS3,VPS4,VPS5
19,20,23,24
IBBP,IBBN,
QBBN,QBBP
8,9
LOIP, LOIN
13
VOUT
Exposed Paddle
Description
Input Common Pins. Connect to ground plan via a low impedance path
Positive Supply Voltage pins. All pins should be connected to the same supply. To ensure
adequate external bypassing, connect 0.1 µF capacitors between each pin and ground.
Adjacent power supply pins of the same name can share one capacitor (see evaluation
board schematic).
Differential In-Phase and Quadrature Baseband Inputs. These high impedance inputs must
be dc-biased to approximately 500 mV dc, and must be driven from a low impedance
source. Nominal characterized ac signal swing is 700 mV p-p on each pin. This results in a
differential drive of 1.4 V p-p with a 500 mV dc bias. These inputs are not self-biased and
must be externally biased.
50 Single-Ended Local Oscillator Input. Internally dc-biased. Pins must be ac-coupled. AC-
couple LOIN to ground and drive LO through LOIP.
Device Output. Single-ended, 50 Ω internally biased RF output. Pin must be ac-coupled to
the load.
Connect to ground plan via a low impedance path
Rev. PrG | Page 5 of 11

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