ADM1069 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADM1069 Datasheet PDF : 34 Pages
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ADM1069
Parameter
ANALOG-TO-DIGITAL CONVERTER
Signal Range
Input Reference Voltage on REFIN Pin, VREFIN
Resolution
INL
Gain Error
Conversion Time
Offset Error
Input Noise
BUFFERED VOLTAGE OUTPUT DACs
Resolution
Code 0x80 Output Voltage
Range 1
Range 2
Range 3
Range 4
Output Voltage Range
LSB Step Size
INL
DNL
Gain Error
Maximum Load Current (Source)
Maximum Load Current (Sink)
Maximum Load Capacitance
Settling Time into 50 pF Load
Load Regulation
PSRR
REFERENCE OUTPUT
Reference Output Voltage
Load Regulation
Minimum Load Capacitance
PSRR
PROGRAMMABLE DRIVER OUTPUTS
High Voltage (Charge Pump) Mode
(PDO1 to PDO6)
Output Impedance
VOH
IOUTAVG
Data Sheet
Min
0
0.592
0.796
0.996
1.246
2.043
1
Typ Max Unit Test Conditions/Comments
2.048
12
0.44
84
0.25
VREFIN
±2.5
±0.05
±2
V
V
Bits
LSB
%
ms
ms
LSB
LSBrms
The ADC can convert signals presented to the
VH, VPx, and VXx pins; VPx and VH input signals
are attenuated depending on the selected
range; a signal at the pin corresponding to the
selected range is from 0.573 V to 1.375 V at the
ADC input
Endpoint corrected, VREFIN = 2.048 V
VREFIN = 2.048 V
One conversion on one channel
All eight channels selected, averaging enabled
VREFIN = 2.048 V
Direct input (no attenuator)
8
Bits
0.6
0.603 V
0.8
0.803 V
1
1.003 V
1.25 1.253 V
601.25
mV
2.36
mV
±0.75 LSB
±0.4 LSB
1
%
100
µA
100
µA
50 pF
2
µs
2.5
mV
60
dB
40
dB
Four DACs are individually selectable for
centering on one of four output voltage ranges
Same range, independent of center point
Endpoint corrected
Per mA
DC
100 mV step in 20 ns with 50 pF load
2.048
−0.25
+0.25
60
2.053 V
mV
mV
µF
dB
No load
Sourcing current, IDACxMAX = −100 µA
Sinking current, IDACxMAX = +100 µA
Capacitor required for decoupling, stability
DC
500
kΩ
11
12.5 14 V
IOH = 0 µA
10.5
12
13.5 V
IOH = 1 µA
20
µA
2 V < VOH < 7 V
Rev. E | Page 6 of 34
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