ADP3163 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP3163

5-Bit Programmable 2-Phase Synchronous Buck Controller

Analog Devices 

ADP3163

Pin Name

1–5 VID4 –

VID0

6 SHARE

7 COMP

8 GND

9 FB

10 CT

11 PWRGD

12 CS+

13 CS–

14 PGND

15 PC

16 PWM3

17 PWM2

18 PWM1

19 REF

20 VCC

PIN FUNCTION DESCRIPTIONS

Function

Voltage Identification DAC Inputs. These pins are pulled up to an internal 3 V reference, providing a

Logic 1 if left open. The DAC output programs the FB regulation voltage from 1.1 V to 1.85 V. Leaving all five

DAC inputs open results in the ADP3163 going into a “No CPU” mode, shutting off its PWM outputs.

Current Sharing Output. This pin is connected to the SHARE pins of other ADP3163s in multiple VRM sys-

tems to ensure proper current sharing between the converters. The voltage at this output programs the output

current control level between CS+ and CS–.

Error Amplifier Output and Compensation Point.

Ground. FB, REF and the VID DAC of the ADP3163 are referenced to this ground. This is a low current ground

that can also be used as a return for the FB pin in remote voltage sensing applications.

Feedback Input. Error amplifier input for remote sensing of the output voltage.

External capacitor CT connection to ground sets the frequency of the device.

Open drain output that signals when the output voltage is outside of the proper operating range or when a phase

is not supplying current even if the output voltage is in specification.

Current Sense Positive Node. Positive input for the current comparator. The output current is sensed as a volt-

age at this pin with respect to CS–.

Current Sense Negative Node. Negative input for the current comparator.

Power Ground. All internal biasing and logic output signals of the ADP3163 are referenced to this ground.

Phase Control Input. This logic-level input determines the number of active phases and the duty cycle limit of

each phase.

Logic-Level Output for the Phase 3 Driver.

Logic-Level Output for the Phase 2 Driver.

Logic-Level Output for the Phase 1 Driver.

3.0 V Reference Output.

Supply Voltage for the ADP3163.

ADP3163

5-BIT CODE

1 VID4

2 VID3

3 VID2

VCC 20

12V

REF 19

1␮F 100nF

20k⍀

PWM1 18

4 VID1

PWM2 17

5 VID0

PWM3 16

6 SHARE

PC 15

7 COMP

PGND 14

100⍀

100nF

8 GND

9 FB

10 CT

CS– 13

CS+ 12

PWRGD 11

VFB

Table I. PWM Outputs vs. Phase Control Code

Maximum

PC

PWM3 PWM2 PWM1 Duty Cycle

REF ON

ON

ON

33%

GND OFF

ON

ON

50%

AD820

1.2V

Figure 1. Closed-Loop Output Voltage Accuracy Test Circuit

–4–

REV. 0

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