ADP5063 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

ADP5063

Linear LiFePO4 Battery Charger with Power Path and USB Compatibility in LFCSP

Analog Devices 

ADP5063

Parameter

BATTERY ISOLATION FET

Pin to Pin Resistance Between

ISO_Sx and ISO_Bx

Regulated System Voltage: VBAT Low

Symbol

RDSON_ISO

VISO_SFC

Battery Supplementary Threshold

LDO AND HIGH VOLTAGE BLOCKING

Regulated System Voltage

VTHISO

VISO_STRK

Load Regulation

High Voltage Blocking FET (LDO FET)

On Resistance

Maximum Output Current

VINx Input Voltage, Good Threshold

Rising

VINx Falling

VINx Input Overvoltage Threshold

Hysteresis

VINx Transition Timing

THERMAL CONTROL

Isothermal Charging Temperature

Thermal Early Warning Temperature

Thermal Shutdown Temperature

RDS(ON)HV

VVIN_OK_RISE

VVIN_OK_FALL

VVIN_OV

ΔVVIN_OV

tVIN_RISE

tVIN_FALL

TLIM

TSDL

TSD

THERMISTOR CONTROL

Thermistor Current

10,000 NTC (Negative Temperature

Coefficient) Resistor

100,000 NTC Resistor

Thermistor Capacitance

Cold Temperature Threshold

Resistance Thresholds

Cool to Cold Resistance

Cold to Cool Resistance

Hot Temperature Threshold

Resistance Thresholds

Hot to Typical Resistance

Typical to Hot Resistance

JEITA1 Li-ION BATTERY CHARGING

SPECIFICATION DEFAULTS5

JEITA Cold Temperature

Resistance Thresholds

Cool to Cold Resistance

Cold to Cool Resistance

JEITA Cool Temperature

INTC_10k

INTC_100k

CNTC

TNTC_COLD

RCOLD_FALL

RCOLD_RISE

TNTC_HOT

RHOT_FALL

RHOT_RISE

TJEITA_COLD

RCOLD_FALL

RCOLD_RISE

TJEITA_COOL

Resistance Thresholds

Typical to Cool Resistance

Cool to Typical Resistance

JEITA Warm Temperature

RTYP_FALL

RTYP_RISE

TJEITA_WARM

Resistance Thresholds

Warm to Typical Resistance

Typical to Warm Resistance

RWARM_FALL

RWARM_RISE

Min Typ

55

3.6

3.8

3.2

3.4

0

5

4.214

3.75

6.7

10

10

4.3

−0.56

330

2.1

3.9

3.6

6.9

0.1

115

130

140

110

100

0

20,500

25,600

24,400

60

2750

3700

3350

0

20,500

25,600

24,400

10

13,200

16,500

15,900

45

4260

5800

5200

Data Sheet

Max Unit Test Conditions/Comments

89

mΩ On battery supplement mode, VINx = 0 V,

VISO_Bx = 3.6 V, IISO_Bx = 500 mA

4.0

V

VTRM[5:0] programming ≥ 4.00 V

3.5

V

VTRM[5:0] programming < 4.00 V

12

mV

VISO_Sx < VISO_Bx, system voltage rising

4.386 V

VSYSTEM[2:0] = 000 (binary) = 4.3 V, IISO_Sx =

100 mA, LDO mode2

%/A IISO_Sx = 0 mA to 1500 mA

485

mΩ IVINx = 500 mA

A

VISO_Sx = 4.3 V, LDO mode

4.0

V

3.7

V

7.2

V

V

µs

Minimum rise time for VINx from 5 V to 20 V

µs

Minimum fall time for VINx from 4 V to 0 V

°C

°C

°C

TJ rising

°C

TJ falling

400

μA

40

μA

pF

°C

30,720 Ω

Ω

°C

Ω

3950 Ω

No battery charging occurs

No battery charging occurs

°C

30,720 Ω

Ω

°C

19,800 Ω

Ω

°C

Ω

6140 Ω

No battery charging occurs

Battery charging occurs at 50% of programmed

level

Battery termination voltage (VTRM) is reduced by

100 mV

Rev. 0 | Page 4 of 44

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