ADSP-21363SBBC-ENG View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADSP-21363SBBC-ENG Datasheet PDF : 44 Pages
| |||
Preliminary Technical Data
Timer WDTH_CAP Timing
The following timing specification applies to Timer0, Timer1,
and Timer2 in WDTH_CAP (pulse width count and capture)
mode. Timer signals are routed to the DAI_P20–1 pins through
the SRU. Therefore, the timing specifications provided below
are valid at the DAI_P20–1 pins.
Table 16. Timer Width Capture Timing
Parameter
Timing Requirement
tPWI
Timer Pulse Width
Min
2 tPCLK
Max
2(231– 1) tPCLK
tPWI
DAI_P20-1
(TIMER2-0)
Figure 13. Timer Width Capture Timing
DAI Pin to Pin Direct Routing
For direct pin connections only (for example DAI_PB01_I to
DAI_PB02_O).
Table 17. DAI Pin to Pin Routing
Parameter
Timing Requirement
tDPIO
Delay DAI Pin Input Valid to DAI Output Valid
Min
Max
1.5
10
DAI_Pn
DAI_Pm
tDPIO
Figure 14. DAI Pin to PIN Direct Routing
ADSP-21363
Unit
ns
Unit
ns
Rev. PrA | Page 21 of 44 | September 2004
Share Link: 