ADT7420UCPZ-R2 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADT7420UCPZ-R2 Datasheet PDF : 24 Pages
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Preliminary Technical Data
ADT7420
SPECIFICATIONS
TA = −40°C to +125°C, VDD = 2.7 V to 5.5 V, unless otherwise noted.
Table 1.
Parameter
Min
Typ
TEMPERATURE SENSOR AND ADC
Accuracy1
ADC Resolution
Temperature Resolution
13-Bit
16-Bit
Temperature Conversion Time
Fast Temperature Conversion Time
1 SPS Conversion Time
Temperature Hysteresis
Repeatability4
Drift5
DC PSRR
DIGITAL OUTPUTS (OPEN DRAIN)
High Output Leakage Current, IOH
Output High Current
Output Low Voltage, VOL
Output High Voltage, VOH
Output Capacitance, COUT
DIGITAL INPUTS
Input Current
Input Low Voltage, VIL
Input High Voltage, VIH
SCL, SDA Glitch Rejection
Pin Capacitance
POWER REQUIREMENTS
Supply Voltage
Supply Current
At 3.3 V
At 5.5 V
1 SPS Current
At 3.3 V
At 5.5 V
Shutdown Current
At 3.3 V
At 5.5 V
Power Dissipation Normal Mode
Power Dissipation 1 SPS
0.7 × VDD
0.7 × VDD
2.7
−0.85
−1.0
13
16
0.0625
0.0078
240
6
60
0.02
±0.015
0.0073
0.1
0.1
3
50
5
210
230
46
65
2.0
4.4
700
150
Max
±0.202
±0.25
±0.50
±0.503
±0.75
5
1
0.4
±1
0.4
10
5.5
250
300
15
25
Unit Test Conditions/Comments
°C
TA = −10°C to +85°C, VDD = 3.0 V
°C
TA = −20°C to +105°C, VDD = 2.7 V to 3.3 V
°C
TA = −40°C to +125°C, VDD = 2.7 V to 3.3 V
°C
TA = −10°C to +105°C, VDD = 4.5 V to 5.5 V
°C
TA = −40°C to +125°C, VDD = 4.5 V to 5.5 V
°C
TA = +125°C to +150°C, VDD = 4.5V to 5.5 V
°C
TA = +125°C to +150°C, VDD = 2.7 V to 3.3 V
Bits Twos complement temperature value of the sign bit
plus 12 ADC bits (power-up default resolution)
Bits Twos complement temperature value of the sign bit
plus 15 ADC bits (Bit 7 = 1 in the configuration register)
°C
13-bit resolution (sign + 12-bit)
°C
16-bit resolution (sign + 15-bit)
ms
Continuous conversion and one-shot conversion modes
ms
First conversion on power-up only
ms
Conversion time for 1 SPS mode
°C
Temperature cycle = 25°C to 125°C and back to 25°C
°C
TA = 25°C
°C
500 hour stress test at +150°C with VDD = 5.0V
°C/V TA = 25°C
µA
CT and INT pins pulled up to 5.5 V
mA
VOH = 5.5 V
V
IOL = 2 mA @ 5.5 V, IOL = 1 mA @ 3.3 V
V
pF
µA
VIN = 0 V to VDD
V
V
ns
Input filtering suppresses noise spikes of less than 50 ns
pF
V
µA
Peak current while converting, I2C interface inactive
µA
Peak current while converting, I2C interface inactive
µA
VDD = 3.3 V, 1 SPS mode, TA = 25°C
µA
VDD = 5.5 V, 1 SPS mode, TA = 25°C
µA
Supply current in shutdown mode
µA
Supply current in shutdown mode
µW
VDD = 3.3 V, normal mode at 25°C
µW
Power dissipated for VDD = 3.3 V, TA = 25°C
1 Accuracy specification includes repeatability.
2 The equivalent 3-Σ limits are ±0.15°C. This 3-Σ specification is provided to enable comparison with other vendors who use these limits.
3 For higher accuracy at 5 V operation, contact Analog Devices.
4 Based on a floating average of 10 readings.
5 Drift includes Solder Heat Resistance and life time test performed as per Jedec Standard JESD22-A108.
Rev. PrA | Page 3 of
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