ADUM1420 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADUM1420 Datasheet PDF : 12 Pages
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ADuM1420
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
All voltages are relative to their respective ground. 4.5 V ≤ VDD1 ≤ 5.5 V, 12 V ≤ VDDA ≤ 18 V, 12 V ≤ VDDB ≤ 18 V, 12 V ≤ VDDC ≤ 18 V,
12 V ≤ VDDD ≤ 18 V. All minimum/maximum specifications apply over the entire recommended operating range, unless otherwise noted.
All typical specifications are at TA = 25°C, VDD1 = 5 V, VDDA = 15 V, VDDB = 15 V.
Table 1.
Parameter
DC SPECIFICATIONS
Input Supply Current, Quiescent
Output Supply Current (A, B, C, or D), Quiescent
Input Supply Current, 10 Mbps
Output Supply Current (A, B, C, or D), 10 Mbps
Input Currents
Logic High Input Threshold
Logic Low Input Threshold
Logic High Output Voltages
Logic Low Output Voltages
Output Short-Circuit Pulsed Current1
SWITCHING SPECIFICATIONS
Minimum Pulse Width2
Maximum Switching Frequency3
Propagation Delay4
Change vs. Temperature
Pulse Width Distortion, |tPLH − tPHL|
Channel-to-Channel Matching,
Rising vs. Rising Edges5
Channel-to-Channel Matching,
Falling vs. Falling Edges5
Channel-to-Channel Matching,
Rising vs. Falling Edges6
Part-to-Part Matching, Rising or Falling Edges7
Part-to-Part Matching, Rising vs. Falling Edges8
Output Rise/Fall Time (10% to 90%)
Symbol
Min
Typ
Max Unit Test Conditions
IDDI (Q)
5.1
8.0 mA
IDDA (Q), IDDB (Q),
IDDC (Q), IDDD (Q)
0.3
1.2 mA
IDDI (10)
12
16 mA
IDDA (10), IDDB (10),
IDDC (10), IDDD (10)
16
22 mA
IIA, IIB, IIC,
IID, IDISABLE
−10
+0.01
+10 μA
VIH
2.0
V
VIL
0.8 V
VOAH, VOBH,
VDDA − 0.1, VDDA, VDDB,
V
VOCH, VODH
VDDB − 0.1, VDDC, VDDD
VDDC − 0.1,
VDDD − 0.1
VOAL, VOBL,
VOCL, VODL
0.1 V
IOA (SC), IOB (SC), 100
mA
IOC (SC), IOD (SC)
CL = 200 pF
0 V ≤ VIA, VIB, VIC, VID,
VDISABLE ≤ VDD1
IOA, IOB, IOC, IOD = −1 mA
IOA, IOB, IOC, IOD = 1 mA
PW
5
tPHL, tPLH
99
PWD
tR/tF
100 ns
CL = 200 pF, ED DISABLE = 0
Mbps CL = 200 pF, ED DISABLE = 0
110
128 ns
CL = 200 pF, ED DISABLE = 0
85
ps/°C CL = 200 pF, ED DISABLE = 0
8
ns
CL = 200 pF, ED DISABLE = 0
5
ns
CL = 200 pF, ED DISABLE = 0
9
ns
CL = 200 pF, ED DISABLE = 0
13 ns
CL = 200 pF, ED DISABLE = 0
10 ns
18 ns
25 ns
CL = 200 pF, ED DISABLE = 0,
input tR = 3 ns
CL = 200 pF, ED DISABLE = 0,
input tR = 3 ns
CL = 200 pF, ED DISABLE = 0
1 Short-circuit duration of less than 1 second. Average power must conform to the limit shown under the Absolute Maximum Ratings.
2 The minimum pulse width is the shortest pulse width at which the specified timing parameters are guaranteed.
3 The maximum switching frequency is the maximum signal frequency at which the specified timing parameters are guaranteed.
4 tPHL propagation delay is measured from the 50% level of the falling edge of the VIx signal to the 50% level of the falling edge of the VOx signal. tPLH propagation delay is
measured from the 50% level of the rising edge of the VIx signal to the 50% level of the rising edge of the VOx signal.
5 Channel-to-channel matching, rising, or falling edges is the magnitude of the propagation delay difference between any two channels of the same part when the
inputs are either both rising or falling edges. The supply voltages and the loads on each channel are equal.
6 Channel-to-channel matching, rising vs. falling edges is the magnitude of the propagation delay difference between any two channels of the same part when one
input is a rising edge and the other input is a falling edge. The supply voltages and loads on each channel are equal.
7 Part-to-part matching, rising, or falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when the inputs
are either both rising or falling edges. The supply voltages, temperatures, and loads of each part are equal.
8 Part-to-part matching, rising vs. falling edges is the magnitude of the propagation delay difference between the same channels of two different parts when one input
is a rising edge and the other input is a falling edge. The supply voltages, temperatures, and loads of each part are equal.
Rev. A | Page 3 of 12
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