ADV7610 View Datasheet(PDF) - Analog Devices
Part Name
Description
Manufacturer
ADV7610 Datasheet PDF : 16 Pages
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Data Sheet
DATA AND I2C TIMING CHARACTERISTICS
Table 2.
Parameter
CLOCK AND CRYSTAL
Crystal Frequency, XTALP
Crystal Frequency Stability
LLC Frequency Range1
I2C PORTS
SCL Frequency
SCL Minimum Pulse Width High2
SCL Minimum Pulse Width Low2
Start Condition Hold Time2
Start Condition Setup Time2
SDA Setup Time2
SCL and SDA Rise Time2
SCL and SDA Fall Time2
Stop Condition Setup Time2
RESET FEATURE
RESET Pulse Width
CLOCK OUTPUTS
LLC Mark:Space Ratio2
DATA AND CONTROL OUTPUTS3
Data Output Transition Time2, 4
I2S PORT, MASTER MODE
SCLK Mark:Space Ratio2
LRCLK Data Transition Time2
LRCLK Data Transition Time2
I2S Data Transition Time2
I2S Data Transition Time2
Symbol Test Conditions/Comments
t1
t2
t3
t4
t5
t6
t7
t8
t9:t10
t11
t12
t15:t16
t17
t18
t19
t20
End of valid data to negative clock edge
Negative clock edge to start of valid data
End of valid data to negative SCLK edge
Negative SCLK edge to start of valid data
End of valid data to negative SCLK edge
Negative SCLK edge to start of valid data
1 Maximum LLC frequency is limited by the clock frequency of UXGA 60 Hz at eight bits.
2 Data guaranteed by characterization.
3 With the DLL block on the output clock bypassed.
4 DLL bypassed on the clock path.
ADV7610
Min Typ
Max Unit
28.63636
MHz
±50 ppm
13.5
165 MHz
400 kHz
600
ns
1.3
µs
600
ns
600
ns
100
ns
300 ns
300 ns
0.6
µs
5
ms
45:55
1.0
0.0
45:55
55:45 % duty cycle
2.2
ns
0.3
ns
55:45
10
10
5
5
% duty cycle
ns
ns
ns
ns
Rev. 0 | Page 5 of 16
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