Tables
Advanced Hardware Architectures, Inc.
Table 1:
Table 2:
Table 3:
Table 4:
Initialization Register Settings for Encode, Decode and Pass-Through Operations . . . . . . . . . . . . . . . . . .7
Burst Operation Using 40 MHz Clock and 1 Clock/Byte, Forward Order Output . . . . . . . . . . . . . . . . . . . . .9
Continuous Operation Using 40 MHz Clock and Specified Clocks/Byte, Forward Outp u tOrder. . . . . . . . 10
Continuous Operation for IESS-308 Codes Using 40 MHz Clock and Specified Clocks/Byte,
Forward Output Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
PS4011C-0200
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