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AKD4392-SB View Datasheet(PDF) - Asahi Kasei Microdevices

Part Name
Description
Manufacturer
AKD4392-SB
AKM
Asahi Kasei Microdevices AKM
AKD4392-SB Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
[AKD4392-SB]
„ Evaluation mode
1. DIR(COAX) (default)
The DIR generates MCLK, BICK and LRCK SDATA from the received data through BNC connector (J7). It is possible for
the evaluation using such as CD test disk.
Setting:R87 = open; R88 = short (0Ω)
COAX is recommended for an evaluation of the Sound quality.
2. DIR(Optical)
The DIR generates MCLK, BICK and LRCK SDATA from the received data through Optical connector (PORT2). It is
possible for the evaluation using such as CD test disk.
Setting:R87 = short (0Ω); R88 = open
3. All clocks are fed through the PORT1.
Setting:
-R54, R55, R56, R58 = open
-R50, R51, R52 = 100Ω; R53 = 5.1Ω
„ DIP Switch setting
[SW1]: AK4115 setting
No.
Pin
L
H
1
OCKS1 Master Clock setting of AK4115
2
OCKS0 Refer to Table 4
Table 2. SW1 setting
Default
H
L
[SW2]: AK4392 setting
No.
Pin
1
-
2
P/S
L
H
-
Serial mode
-
Parallel mode
Table 3. SW2 setting
Default
-
L
<KM099800>
3
2009/06

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