GVT71256D36T-4.4 View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

GVT71256D36T-4.4

256K x 36/512K x 18 Pipelined SRAM

Cypress Semiconductor 

PRELIMINARY

CY7C1360A/GVT71256D36

CY7C1362A/GVT71512D18

Switching Waveforms

Read Timing[29, 30]

CLK

ADSP#

ADSC#

ADDRESS

BWa#, BWb#,

BWc#, BWd#

BWE#, GW#

CE#

ADV#

OE#

DQ

tS

tH

tS

A1

tH

tKC

tKL

tKH

A2

tS

tS

tH

tKQ

tKQLZ

tOELZ

tOEQ

tKQ

Q(A1)

Q(A2)

Q(A2+1)

SINGLE READ

Q(A2+2)

Q(A2+3)

Q(A2)

Q(A2+1)

BURST READ

Notes:

29. CE active in this timing diagram means that all chip enables CE, CE2, and CE2 are active. CE2 is only available for TA package version.

30. For the X18 product, there are only BWa and BWb for byte write control.

21

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