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AM29LV160BB-70RSK View Datasheet(PDF) - Advanced Micro Devices

Part Name
Description
Manufacturer
AM29LV160BB-70RSK Datasheet PDF : 54 Pages
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Am29LV160B
16 Megabit (2 M x 8-Bit/1 M x 16-Bit)
CMOS 3.0 Volt-only Boot Sector Flash Memory
This product has been retired and is not recommended for designs. For new and current designs, S29AL016D supersedes Am29LV160B and is the factory-recommended migration path.
Please refer to the S29AL016D datasheet for specifications and ordering information. Availability of this document is retained for reference and historical purposes only.
DISTINCTIVE CHARACTERISTICS
Single power supply operation
— Full voltage range: 2.7 to 3.6 volt read and write
operations for battery-powered applications
— Regulated voltage range: 3.0 to 3.6 volt read and
write operations and for compatibility with high
performance 3.3 volt microprocessors
Manufactured on 0.32 µm process technology
High performance
— Full voltage range: access times as fast as 80 ns
— Regulated voltage range: access times as fast as
70 ns
Ultra low power consumption (typical values at
5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 9 mA read current
— 20 mA program/erase current
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
thirty-one 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
thirty-one 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
— A hardware method of locking a sector to prevent any
program or erase operations within that sector
— Sectors can be locked in-system or via programming
equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
Top or bottom boot block configurations
available
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
Minimum 1,000,000 write cycle guarantee
per sector
20-year data retention at 125°C
— Reliable operation for the life of the system
Package option
— 48-ball FBGA
— 48-pin TSOP
— 44-pin SO
CFI (Common Flash Interface) compliant
— Provides device-specific information to the
system, allowing host software to easily
reconfigure for different Flash devices
Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
Data# Polling and toggle bits
— Provides a software method of detecting program
or erase operation completion
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion (not available
on 44-pin SO)
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data
This Data Sheet states AMD’s current technical specifications regarding the Product described herein. This Data
Sheet may be revised by subsequent versions or modifications due to changes in technical specifications.
Publication# 21358 Rev: H Amendment/4
Issue Date: June 6, 2005

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