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AN201 View Datasheet(PDF) - Vishay Semiconductors

Part Name
Description
Manufacturer
AN201 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
AN201
Vishay Siliconix
This typical offset (at 25_C) should be compared with the
signal level to determine whether the error introduced by the
offset is acceptable.
Another source of error that may be introduced by the switch
occurs when the switch changes state. Transients (due to
capacitive coupling between the drivers and drain) can be
manifested as an error voltage appearing on the output node.
The effect of charge injection is measured in volts and is given
by
V = Qi/C
where
Qi is the injected charge in picocoulombs
C is the load capacitance at the output.
The DG408/409 devices have been internally compensated to
minimize the effects of the injection. This is achieved by
including compensation capacitors on the output switch.
These capacitors are sized to produce an equal and opposite
transient which tends to cancel out the effect of the switch
injection. Typical charge injection for the DG408/409 is 20 pC
for the test configuration shown in Figure 7.
RSOURCE
VSOURCE
VSOURCE = 0 V
RSOURCE = 0 W
DG408
VO
10 nF
the greater the number of channels, the slower the speed due
to additional capacitance at the common output node.
The DG408/409 switching speed (tTRANS) is 250 ns maximum
at room temperature with a 10-ns minimum break-before-
make time. While this break-before-make time prevents
overlap or aliasbetween channels, it reduces multiplexer
efficiency and, therefore, is kept as short as possible.
A channel-switching rate (Figure 8) is defined for the
DG408/409 by tON, tOFF, and tSAMPLE, where tSAMPLE is
dependent on the application.
Channel 1
tON
tSAMPLE
tOFF
Channel 2
FIGURE 8. Channel Switching Rate
Assuming a tSAMPLE of 1.2 ms, the maximum switching rate for
the DG408/409 (with no pulse-edge overlap) is once every
1.5 ms or a frequency of 666 kHz. This example shows that the
switching speed of the DG408/409 is not a significant factor
unless the tSAMPLE time becomes much smaller. For
multi-channel systems, if the sampling theorem is obeyed, the
maximum switching rate will limit the number of channels
and/or the maximum frequency components of any of the
channel inputs. Techniques are available to improve the
switching rate, and an example using the DG408/409 and
DG400 will be shown later.
VO
Address SW Off
Switch On
DVO
SW Off
FIGURE 7. Charge Injection Test Circuit
Versatility
With CMOS switches, signal conduction is the same in either
direction. Therefore, as shown in Figure 9, its possible to use
the DG408 as a demultiplexer with one input from the
digital-to-analog converter and 8 outputs.
Switching Speed
Multiplexers operate in real time (i.e., samples are taken
sequentially and represent the analog input signal). Obviously,
the quicker a multiplexer changes state, the more samples can
be taken in a given time. Fast switching operation is often
difficult to achieve using larger multiplexing devices. That is,
Document Number: 70600
05-Aug -99
Digital
Output
From
Processor
D/A
Converter
DG408
OUT1
OUT8
FIGURE 9. Using the DG408 as a Demultiplexer
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