AN201 View Datasheet(PDF) - Vishay Semiconductors

Part Name

Description

Manufacturer

AN201

High-Performance Multiplexing with the DG408

Vishay Semiconductors 

AN201

Vishay Siliconix

This versatility allows the same advantages at the “back end”

of the system—that is, a single wire can be used to carry all the

control signals to the remote site. Then the control signals may

be converted back to analog form and demultiplexed for

controlling the system.

Logic Compatibility

The compatibility of the multiplexer is a measure of how easy

it is to interface with other system components, such as

transducers, A/D converters, power supplies, the

environment, etc.

The DG408/409 has many features which make this

interfacing as easy as possible. For example, a regulator has

been included on the chip to provide stability against power

supply and temperature variations. The regulator maintains

TTL compatibility over power supply variations, while the

dynamic specifications can be met over the full military

temperature range. The regulation also guarantees a low

current consumption of "75 mA, making it suitable for

battery/portable applications.

Application Enhancements

The following examples of applications using the DG408/409

are intended to highlight some specific improvements over

their predecessors.

Sample-and-hold circuits using analog multiplexers are widely

used in analog signal processing and data conversion

systems to store analog voltages accurately over time periods

ranging from nanoseconds to several minutes. This ability

finds many applications, including data distribution systems,

simultaneous sample-and-hold designs, sampling

oscilloscopes, digital volt meters, signal reconstruction filters,

and analog computational circuits. Although they are

theoretically simple, these high-speed, high-accuracy circuits

need careful consideration in their design. Figure 10 shows

the DG408 in a sample-and-hold circuit. During the sample

phase, one switch in the analog multiplexer is closed and the

hold capacitor is charged to the input voltage via the on-state

switch. Once the capacitor is charged to its final value, the hold

mode is entered by opening the switch.

During the hold mode, the capacitor voltage can be examined

via the low-leakage buffer. By repeating this with other

switches in the multiplexer, many analog inputs can be

sequentially examined.

In a high-speed system, an important specification for the

circuit designer is the acquisition time of the sample-and-hold

system—that is, the time delay between the sample command

and the capacitor reaching its final value.

Figure NO TAG shows that the acquisition time is dependent

on two factors. The first factor is the time from when the sample

command is given to when the switch is turned on (i.e., the ton

of the switch). For the DG408, the ton is guaranteed as 250 ns

maximum at 25_C; this translates to a 4 times improvement

over existing pin-compatible devices.

The second contribution to acquisition time is the time taken

for the hold capacitor to charge to its final value. The charging

time is determined by the source impedance of the analog

source, the on-resistance of the switch, and the hold capacitor.

Hence, for low-impedance analog sources, the on-resistance

of the switch will play an important part in determining the time

constant. The on-resistance of the DG408/409 is guaranteed

at 100 W over the whole analog voltage range, making a 500%

improvement over existing pin-compatible parts.

IN1

DG408

IN2

Amplifier

+

–

Low Leakage

Buffer

+

CH

–

A/D

Converter

To

Processor

www.vishay.com

6

FIGURE 10. High Performance Sample/Hold Circuit

Document Number: 70600

05-Aug -99

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