AN207 View Datasheet(PDF) - Vishay Semiconductors
Part Name
Description
Manufacturer
AN207 Datasheet PDF : 12 Pages
| |||
AN207
Vishay Siliconix
600
500
a)
400
300
+5 V
VL V+
VS
b)
c)
ISD
GND V–
200
a) V+ = 5 V
b) V+ = 12 V
100
c) V+ = 12 V, ISD = 10 mA
0
0 2 4 6 8 10 12 14 16 18 20
VS – Source Voltage (V)
FIGURE 7. Typical rDS(on) Characteristics
Figure 7 illustrates typical on-resistance curves. Curve (a)
represents single 5-V operation. Assuming a maximum
acceptable rDS(on) value of 200 Ω, the usable analog signal
range goes from 0 V to slightly over 2 V. Curve (b) shows
operation with V+ = 12 V. Now the usable signal range has
increased to 8 V. If you want to operate in the flat,
low-resistance part of the curve, you may want to limit your
analog signal to no more than 6 V. Curve (c) was generated
using a –10-mA ID current. Note that when VS = 12 V, it still
shows an rDS(on) = 480 Ω . To sink 10 mA, VD has gone down
to 7.2 V, and this creates a partial channel enhancement.
V+
IN
V–
V+
D
S
V–
FIGURE 8. ESD Protection Diodes are Located at all
Control and Switch Pins
High-Speed 8-Channel Analog Multiplexer
If you are designing a high-speed data acquisition system,
then you will need a very fast analog multiplexer. A fast
multiplexer like the DG408 specifies a typical transition time of
160 ns. By using the DG611 to make the multiplexer shown in
Figure 9, you will achieve transition times in the 30-ns range,
a sixfold speed improvement. This added speed will allow you
to achieve sampling rates in excess of 3 MHz, as
demonstrated below.
ESDS (ESD Sensitivity)
By incorporating a CMOS driver in front of the DMOS FET,
direct access to the DMOS gate has been eliminated. By itself,
this goes a long way to reduce ESD sensitivity. Additional ESD
protection diodes have been added to the source and drain
pins. Nevertheless, to maintain high speed, a compromise
between ESD protection, speed, on-resistance, and
on-capacitance had to be reached. This means that the
protection diodes are relatively small and protect only up to
about 500 V. To prevent damage from high-energy
electrostatic fields, anti-static handling precautions must be
observed at all times.
Applications
Following is a collection of practical application hints and
design ideas intended to help you design with the DG61X
family.
Document Number: 70605
03-Aug-99
For an 8-channel multiplexer the maximum sampling rate is
given by:
fS + 8
1
(tSETTLING ) tTRANS)
(1)
where tSETTLING = N rDS(on) C(on)
(2)
for an accuracy of 0.01% (12 bits) N = 9.
For small signals, let us assume that typical rDS(on) = 18 Ω
The output node capacitance is given by:
C(on) = 1 CD(on) + 7 CD(off) = 10 pF + 7 2 pF = 24 pF
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