AN202 View Datasheet(PDF) - Philips Electronics
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AN202 Datasheet PDF : 5 Pages
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Philips Semiconductors
Testing and specifying FAST logic
Application note
AN202
DC ELECTRICAL CHARACTERISTICS
This table reflects the DC limits used by Philips Semiconductors
during its testing operations and conducted under the conditions set
forth under the Recommended Operating Conditions table. VOH, for
example, is guaranteed to be no less than 2.7V when tested with
VCC = +4.75V, VIH = 2.0V, VIL = 0.8V, across the temperature range
from 0° to 70°C, and with an output current of IOH = –1.0mA. In this
table, one sees the heritage of the original junction isolated Schottky
family … VOL = 0.5V at IOL = 20mA. This gives the user a
guaranteed worst-case Low state noise immunity of 0.3V. In the
High state the noise immunity is 0.7V worst case. Although at first
glance it would seem one-sided to have greater noise immunity in
the High state than in the Low, this is a useful state of affairs.
Because the impedance of an output in the High state is generally
much higher than in the Low state, more noise immunity in the High
state is needed. This is because the noise source couples noise
onto the output connection of the device — that output tries to pull
the noise source down by sinking the energy to ground or to VCC
depending on the state. The ability of the output to do that is
determined by its output impedance. The lower half of the output
stage is a very low-impedance transistor which can effectively pull
the noise source down. Because of the higher impedance of the
upper stage of the output, it is not as effective in shunting the noise
energy to VCC, so that an extra 0.4V of noise immunity in the High
state compensates for the higher impedance. The result is a nice
balance of sink and drive current capabilities with the optimum
amount of noise immunity in both states.
II, the maximum input current at maximum input voltage, is a
measure of the input leakage current at the guaranteed minimum
input breakdown voltage of 7.0V. Although some users consider this
to be a test of the input breakdown itself, that voltage is typically
over 15V. At room temperature, this leakage current should be less
than 10µA. (This is not the case with NPN input designated parts.)
Short-Circuit Output Current is a parameter that has appeared on
digital data sheets since the inception of integrated circuit logic
devices, but the meaning and implications of that specification
have totally changed. Originally, IOS was an attempt to reassure the
user that if a stray oscilloscope probe accidentally shorted an output
to ground the device would not be damaged. In this manner, an
extremely long time was associated with the IOS test. However,
thermally induced malfunctions could occur after several seconds of
sustained test. Over a period of time, IOS became a measure of the
ability of an output to charge line capacitance. Assume a device is
driving a long line and is in the Low state. When the output is
switched High, the rise time of the output waveform is limited by the
rate at which the line capacitance can be charged to its new state of
VOH. At the instant that the output switches, the line capacitance
looks like a short to ground. IOS is the current demanded by the
capacitive load as the voltage begins to rise and the demand
decreases. The full value of IOS need only be supplied for a few
hundred microseconds at most, even with 1.0µF of line capacitance
tied to the output, a load that is unrealistically high by several orders
of magnitude.
The effective of a large IOS surge through the relatively small
transistors that make up the upper part of the output stage is not
serious, AS LONG AS THAT CURRENT IS LIMITED TO A SHORT
DURATION. If the hard short is allowed to remain, the full IOS
current will flow through that output state and may cause functional
failure or damage to the structure. A test induced failure may occur if
the IOS test time is excessive. As long as the IOS condition is very
brief, typically 50ms or less with automated test equipment, the local
heating does not reach the point where damage or functional
failures might occur. As we have already seen, this is considerably
longer than the time of the effective current surge that must be
supplied by the device in the case of charging line capacitance. The
Philips Semiconductors data sheet limits for IOS reflect the
conditions that the part will see in the system — full IOS spikes for
extremely short periods of time. Problems could occur if slow test
equipment or test methods ground an output for too long a time
causing functional failure or damage.
AC TESTING
FAST data sheets carry several types of AC information. The AC
Characteristics table contains the guaranteed limits when tested
under the conditions set forth under the AC Test Circuits and
Waveforms. In some cases, the test conditions are further defined
by the AC Setup Conditions — this is generally the case with
counters and flip-flops where setup and hold times are involved. All
of the AC Characteristics are guaranteed with 50pF load
capacitances and with the fewest number possible of outputs
switching, depending upon the functionality of the device. One of the
sets of limits is specified at 25°C and +5.00V VCC — these relate
closely to the standard Schottky specification which are under
similar conditions but use only 15pF load capacitances. While these
numbers are convenient for comparing the two families, keep in
mind that using full 50pF loads with the Schottky devices would add
several nanoseconds to their propagation delays. These numbers
are ideal for checking out test jigs and correlating data since they do
not involve temperature or supply voltage spreads. For system
design, full specifications are included that include temperature and
supply voltage variations — in one case the military ranges and in
the other, the commercial ranges.
AC TEST JIGS AND SETUPS
Each FAST data sheet spells out the test circuit used to check AC
performance, the waveforms, measurement points, rep rate, test
loads, etc., but these are only the quantifiable variables involved in
this testing. There is another more complex side to the issue — test
jigs and equipment setups.
To get an appreciation for the problems involved in testing FAST,
consider these facts. The output rise and fall times on FAST outputs
are very sharp. Translating these edge rates into the effective sine
wave equivalents generates frequencies on the order of several
hundred MHz. At these frequencies, attention to RF phenomena is
required.
Because of these RF frequencies, it is necessary to have an AC test
jig that has minimal modifying effect on the input and output
waveforms. To do this, the jig must be constructed properly. The
following items are key in dealing with AC jig construction.
BYPASSING CAPACITORS
Philips Semiconductors uses high quality capacitors that have good
RF qualities to decouple the power supply lines on the test jig, right
at the VCC pin to the ground plane. Four capacitors with absolute
minimum lead length are used. Microwave chip capacitors are
recommended. (Note: In some sensitive test environments it is
advisable to decouple the VCC, as well as bypass. This is done by
passing the VCC through a wire wrapped around a ferrite core
6-8 times. The inductor created helps decouple the noise from VCC
and reduces dramatically the tendency for feedback oscillations
through the VCC and ground current loop. This is a key problem on
clocked parts since the ground bounce created by the fast edge
rates and high currents will effect VCC and ground substantially and
thereby effect internal thresholds.) These are one each, 10µF
dipped tantalum, 0.1µF dipped tantalum or chip, 0.001µF chip and
100pF chip.
June 1987
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