AN202 View Datasheet(PDF) - Philips Electronics

Part Name

Description

Manufacturer

AN202

Testing and specifying FAST logic

Philips Electronics 

Philips Semiconductors

Testing and specifying FAST logic

Application note

AN202

50pF C1

R45ÔÔ10ΩDEÏÏÔÔVICEÏÏÔÔPINÏÏÔÔÏÏÔÔJ1J1(ÏÏÔÔÏINPUTÏÏÔÔÏONLÑÑÔÔÏÏY) ÑÑÔÔÏÏÔÔÔÔÏÏÔÔÔÔÏÏJ2ÑÔÔÔÏÏ(3-SÑÔÔÔTÏÏATE)ÔÔÔÏÏÔÔÔÏÏÔÔÔÏÏÔÔÔÏÏÔÔÔÏÏ

(OUTPUT ONLY) 500Ω R2

50Ω R3

ÏÏ ÔÔ ÑÑ BOTTOM

ÏÏ ÔÔ ÑÑ SIDE

PAD

(BOTH SIDES)

TOP SIDE

GROUND

a. Board Layout

J1 (INPUT ONLY)

S1

DUT

J2

(OUTPUT ONLY)

R1

450Ω

R3

PULSE

50Ω

GENERATOR

7V

50Ω

SCOPE

J3 (3-STATE)

R2

500Ω

C1

VS1

VS2

VS3

VT (7V)

b. Schematic

Figure 2. FAST AC Test Fixture

SF01269

HIGH-FREQUENCY DESIGN

The exact jig delay time is determined by the size of the universal jig

that is being used. It is important to know that the frequency

response of the jig must be High to prevent any delay factor from

varying with the edge rates. The frequency response of the jig

indicates how constant the impedance remains over frequency. The

characteristics impedance of a transmission line is expressed as:

Ǹ ZO

+

V

I

+

LO

CO

Where LO is the inductance per unit length, CO is the capacitance

per unit length, ZO is in Ohms, LO in Henrys, and CO in Farads.

Propagation velocity and its inverse, delay per unit length d, are also

expressed in LO and CO …

V

+

ǸL

1

OCO

d + ǸLOCO

where δ is expressed in nanoseconds, LO is in microhenrys per unit

length, and CO in microfarads per unit length. From this, it is clear

that if the ZO changes over frequency, then the delay per unit length

will vary as well. Therefore, it is imperative to know how the jig

responds over frequency and that all measurement line lengths are

identical.

Frequency response also depends on the phase as well as the

magnitude of the impedance. If the phase changes so does the

delay, since delay is the derivative of phase change with frequency.

An S-parameter analysis is needed in evaluating jig performance.

UNIVERSAL JIG CONSTRUCTION

Jig universality is with respect to chip pin count and VCC and ground

pin placements and as such, separate universal test jigs are built for

14, 16, 20, 24, and 28 pin parts.

An S-parameter analysis was performed in a network analyzer to

optimize the jig layout. This assured that the jig had a flat frequency

response over the spectrum of interest for FAST products. Figure 2b

shows the schematic of the fixture and Figure 2a shows a drawing

of the board layout, component placement and signal paths. The

equipment used to analyze the jigs and loads was: HP8505A

Network Analyzer, HP8503A S-Parameter Test Set and HP8501A

Storage Normalizer. In some measurements the equipment was

driven by an HP9845B desk-top computer.

Jigs produced in this way should have minimal lead length to reduce

the characteristic inductance. This in turn minimizes reflections with

their accompanying waveform distortions. and measurement

inaccuracies.

June 1987

4

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