ICs for TV
s Terminal Equivalent Circuits (continued)
Pin No.
Equivalent circuit
27
27
Description
ADD:
L+R (after AGC) output pin
AN5295NK
Voltage (V)
6
28
C-In:
6
C-ch. input pin
28 200 Ω
50 kΩ
1/2 VCC
29
VCC :
12
Power supply pin
30
L-In:
6
L-ch. input pin
30 200 Ω
50 kΩ
1/2 VCC
s Technical Information
• I2C bus
1. DAC
1) Built-in 5 DAC controls and 8 switches
2) Incorporating auto-increment functions
(1) Sub address 0* : Auto-increment mode
(Data are inputted by the change of sub-address according to the transfer when data are sequentially transferred.)
(2) Sub address 8* : Data renewal mode
(Data are inputted with the same sub-address when data are sequentially transferred.)
3) I2C bus protocol
(1) Slave address: 10000000 (80H)
(2) Format (normal)
S Slave address A Sub address A Data byte A P
Start condition Acknowledge bit
Stop condition
(3) Auto-increment mode/data renewal mode
S Slave address A Sub address A Data 1 A Data 2 A
Data n A P
4) Typical data should be inputted at power on because initial state of DAC is not guaranteed.
9